We now step into the industrial world, which is experiencing growth in smart manufacturing, industrial automation, and predictive maintenance. These are all driving the need for faster processing and better efficiencies at the edge. Last time, we focused on isolating HDMI signals in digital health care; see here.
Gigaspeed Isolation Requirements in Industrial Automation
Processing large quantities of data offers insights and enables real-time decision-making, reducing latency and overall costs. How does this relate to the industrial space? The rapid increase in sensors capturing key information to ensure a system runs effectively increases the need for scalability and flexibility in edge processing.
Focusing on factory automation, where PLCs are used to process and control in harsh environments, requires a high level of robustness to ensure reliable operation. Traditionally, these devices have had limited processing capabilities and were designed for simple data processing. With the rise in edge processing, these processing capabilities are bolstered by CPUs/GPUs capable of much higher performance. Thus, the synergy between these devices offering increased responsiveness and data optimization, reduced latency, and high levels of robustness is crucial.
ADI’s isolation technology offers protection from failures caused by high current noise or dynamic load conditions that can create significant ground deltas, a robust solution that can easily prevent equalizing currents and provide high common mode transient immunity.
Peripheral Component Interconnect Express (PCIe)
PCIe is a high-speed serial computer expansion bus- one of the main interfaces in GPUs/motherboards. A standard since 2003, it offers gigaspeed capability, from Gen 1 supporting 2.5GT/s to Gen6 for 64GT/s, and operates with full-duplex operation for efficient and fast data transfer. No doubt you have encountered this when expanding your home pc or laptop. So, what does it mean when it comes to industrial automation?! PCIe is an interface that enables connection to many other types of high-speed interfaces, from Ethernet controllers to USB devices and everything in between. The PCIe interface is a serial bus that utilizes two low-voltage differential serializer (LVDS) pairs (to learn more about PCIe, see here). For PCIe Gen 1, the pairs comprise one transmit and one receive of 2.5 Gbps in each direction. Although PCIe supports different bus widths up to 32x pairs, we’ll focus on the need for 2x pair. From there, you’ll see how easy it is to support different bus widths.
Considerations for the Isolation of PCIe Gen 1
The key to the isolation of the PCIe is to ensure that integrity is maintained- all signals must pass through the isolation barrier fully intact. For correct isolation of PCIe protocol, in addition to the gigaspeed data being passed through, the following must be considered:
- Accurately transmit the electrical idle condition. Required to transmit the signal state transitions, it indicates when a link has entered a temporarily inactive state, signalling entry/exit into low-power states as well as link speed changes. For example, the PCIe specification requires that a receiver differential voltage greater than 175 mV is in a non-idle state, and a differential voltage less than 65 mV is in an idle state.
- Maintain signal robustness --crucial for reliable communication in PCIe systems.
Gigaspeed Isolation PCIe Solutions
The ADN4622 isolator is a key enabler for PCIe Gen1 to isolate the two LVDS pairs; however, it is important to know how to get it to work in harmony with the PCIe Gen 1 signals.
The PCIe signal composition must be considered to ensure that the protocol's key behaviors are fully supported. The Level shift is needed to support the signal's transition through the ADN4622, and electrical idle support ensures the idle state is propagated. This is captured with the coupling network blocks at each input and output of the ADN4622, as shown in Figure 1.
In addition to the coupling network, MAX14954 PCIe redriver employs equalization and improves signal integrity.
A 100 MHz reference clock (REFCLK) signal is used for synchronization and is a prerequisite to begin data transmission. The ADN4620 can easily isolate this signal.
The system management bus, a two-wire signal operating on the principles of I2C, provides information to and from the system's devices. The ADuM1252 I2C device can isolate these signals.
High-to-low or low-to-high signals must be propagated accurately to ensure correct PCIe protocol support. These include WAKE and CLKREQ for the propagation of a low-power state, and PERST is used to reset the link, which is required for proper operation. It is important to signal the link initialization from the endpoint to the root complex and vice versa. PRNST indicates that a card is present and inserted correctly on both ends, where all power supply and signal pins are connected. This avoids powering up a card inserted incorrectly, which may cause damage. These signals are addressed using the ADuM341N general-purpose digital isolator.
Figure 1: Isolation of PCIe Gen 1 interface utilizing ADI’s isolation technology
The isolated power solution, which ensures full isolation across the barrier (the LT8302 can easily support this function), is not captured in Figure 1.
Conclusion
This blog considered how to isolate the PCIe Gen1 protocol in an industrial setting. It could also be applied to any other end application that requires isolation for requirements such as robustness, noise, and protection. This can be easily scaled for higher lane widths by replicating the gigaspeed section of Figure 1.
Read more from the Gigaspeed Isolation series