How Fast Precision DACs Add Value to your Precision Drive Signal Chains

In the previous blog post we analyzed deeply the difference between High-Speed DACs and Fast Precision DACs, focusing on the challenges and the specific features for their corresponding applications.

In this blog post, the last one of the series, we will explore the key parameters of a Fast Precision DAC and the performance achieved with the state-of-the-art AD35xxR family. This family encompasses 6 parts:

• AD3552R / AD3551R: Dual-channel and single-channel, 16-bit DACs with external Transimpedance Amplifier (TIA) and Quad SPI (QSPI) interface (Figure 1).

  Figure 1. AD355xR block diagram

• AD3542R / AD3541R: Dual-channel and single-channel, 16-bit DACs with internal TIA and Dual SPI interface (Figure 2).
• AD3542R-12 / AD3541R-12: Dual-channel and single-channel, 12-bit DACs with internal TIA and Dual SPI interface (Figure 2).

Figure 2. AD354xR block diagram

The most relevant improvement of Fast Precision DACs compared to traditional Precision DACs is update time. The update time takes into account the time to transfer the data from the controller to the DAC, the time to process the data in the DAC and the time to settle the output to the desired voltage. Every effort has been taken to minimize the update time in AD35xxR family. By reducing the update time, the part is better suited for closed-loop where latency limits the reaction time, such as Hardware in the Loop (HiL).

Figure 3. Data transfer and settling time

• The AD355xR features a QUAD SPI interface with Double Data Rate (DDR) that allows transferring a 16-bit word in just two clock cycles. With a clock speed up to 66 MHz, the transfer time is as low as 30 ns, as shown in Figure 3. The AD354xR features a Dual SPI DDR interface that allows transferring a 16-bit word in four clock cycles, that is 60 ns. Data transfer overhead is minimized by using the streaming mode, that allows sending an unlimited stream of samples within the same transaction with a single issue of the register address.
• The AD35xxR family reduces the processing overhead by performing all digital operations on the fly as bits are latched in. Therefore, when the last data bits are input, there is only a combinatorial delay until the DAC starts driving the new value.
• Settling time is usually a slow operation, where the fine-grain convergence to the final value can take longer than the coarse-grain slewing between two codes. The AD35xxR family can perform a large-step transition and settle to 0.1% accuracy in 100 ns. The AD355xR uses an external TIA, allowing the user to cater for bandwidth, noise and slew rate as required for his application.

The AD35xxR family also features configurable output voltage ranges, shown in Figure 4.

• The AD355xR offers maximum flexibility since it allows custom configuration of amplitude and offset in addition to 5 pre-defined ranges. Using an external TIA allows selecting the appropriate amplifier to drive the intended load.
• The AD354xR only allows using one of the 5 pre-defined ranges. Having an internal TIA allows using a smaller package for space-constrained applications that do not need to drive heavy loads.

 Figure 4. AD355xR block diagram

The AD35xxR family is not only designed for gaussian signals and HiL. It is also well suited for harmonic applications such as precision waveform generation. The high sampling rate allows generating very clean tones over a wider bandwidth, reducing the need to switch filters. Figure 5 presents the THD of the AD35xxR family.

Figure 5. AD35xxR Family THD

The AD35xxR family offers two precision modes that can be alternated without reconfiguration. Fast mode allows using 16-bit data words to maximize the update rate while Precision mode offers higher accuracy using 24-bit data words. The comparison between the two modes in terms of DNL and INL is shown in Figure 6.

Figure 6. AD35xxR DNL and INL comparing Fast mode and Precision mode

16-bit and 24-bit samples can be interleaved to enjoy the benefits of each one. For example, 16-bit samples can be used to produce a fast transition between two levels and then 24-bit samples can be used to produce a slower but more accurate voltage.

Additional information and design resources are available in the AD35xxR product pages and signal chain pages:

• AD3552R Datasheet and Product Info
• AD3551R Datasheet and Product Info
• AD3542R Datasheet and Product Info
• AD3541R Datasheet and Product Info
• Precision Wide Bandwidth Signal Chains

This blog is the last issue of a series of five posts on Precision Wide Bandwidth applications:

•  Precision Wide Bandwidth Measurement and Drive  
•  Precision Wide Bandwidth Output Signal Chains 
•  Fast Precision DAC Application: Hardware in the Loop (HiL)  
•  Fast Precision DACs versus High-Speed DACs: Similarities and Differences