Dealing with Heat Everywhere and All at Once

Product datasheets and reliability data have quite a bit of information. There are multiple, reported thermal metrics and parameters that may help identify how temperature affects component performance. We’ve demonstrated in a previous blog post that maximum junction temperature and thermal resistance are two of these important properties in safe design and operation. This blog post continues the discussion on thermal design and management by briefly exploring the thermal derating and the thermal characterization parameters in integrated circuit packages.    

Thermal Derating

Thermal derating, whether reported or measured, helps prolong a device’s life in the design and part selection processes. Derating involves operating the component at less than its maximum specifications. Like other thermal data, it relies on package type, temperature, and dissipated power. Derating curves show how much power can be drawn from the chip under given airflow and ambient temperature conditions. Maintaining the power dissipation within the safe operating area will help us accurately predict device operation and reduce the rate at which the component degrades. 

The thermal deration function may be defined here with power P, junction temperature T_J, and ambient temperature T_A: 

 Deration Function:  \frac{P}{T_J-T_A}

This function is often expressed in units of mW/°C.  

Fig. 1. Thermal Derating Curve for MAX20471 

As an example, the MAX20471 Synchronous Boost Converter datasheet for the TDFN package lists: 1951 mW continuous power dissipation and “derate 24.4 mW/°C > 70°C”, which suggests that less power than 1951 mW should be dissipated at temperatures above 70°C. We can generate this curve as shown in Figure 1. We should monitor and maintain power dissipation within the bounds of this curve. 

Thermal Characterization Parameter

Thermal derating isn’t all we have to consider. Thermal resistance, for instance, has proven useful when we looked at transistor outline package types such as the TO-220 which typically has three easily identifiable leads. In recent decades, our engineers may choose multi-lead and surface-mount components to save on space and reduce form factor instead—this added complexity leads to increasingly unpredictable heat behavior. Where, then, does the heat flow? This heat path can be ambiguous. 

Fig. 2. Different IC Package Types 

Folks often inquire about a junction-to-board thermal resistance Θ_JB, for each of our ICs, to obtain the heat dissipation for the entire device, but too many variables are involved: test conditions, thermal chambers, not to mention it is especially dependent on printed circuit board material and conductivity. (*Obtaining this value isn’t impossible: see test standard JESD51-2A.) 

Fortunately, the Joint Electron Device Engineering Council (JEDEC) points to the thermal characterization parameter Ψ (pronounced “psi”) to better capture device heat dissipation in modern package types (standard JESD51-12). The thermal characterization parameter provides insight into device and package heat flow similarly to reported thermal resistance but is used a little differently. Ψ includes convection from the top of the package and radiation from the package as well. This may be more useful than thermal resistance, theta Θ, a quantity based only on surface-to-surface contact heat transfer or heat conduction. Thermodynamics enthusiasts will recall that convection is a heat transfer from fluid movement, which is more commonly in the form of airflow in integrated circuits while radiation refers to the heat transfer emitting from the device’s vibrational motion at the molecular level. 

Ψ in Action

The following expressions are used when considering the board temperature, T_B, and junction-to-board thermal characterization parameter Ψ_JB: 

  \psi_{JB}=\frac{T_J-T_B}{P_D}

  T_J=\psi_{JB}\times P_D+T_B

These expressions with the thermal characterization parameter are very similar to the models for thermal resistance albeit a more holistic representation because it is not based entirely on conductive heat transfer. Using Ψ will help in calculations where board temperature is known to predict junction temperature and avoid exceeding the maximum junction temperature, T_J,MAX.  

Fig. 3. Example Power Dissipation with SOIC Junction Temperature Rise and Different Board Temperatures, ADP7142 

As shown in the diagram for the ADP7142 linear regulator and SOIC package type, lower board temperature allows for higher power dissipation without exceeding T_J,MAX. Figure 4 compares the Θ and Ψ values for different package types. 

Fig. 4. Comparison of Θ_JC, Θ_JA, and Ψ_JB Values, ADP7142 

Recognizing that there is more to thermal management than just working with maximum junction temperature and thermal resistance goes a long way in our tests and designs. Remember that these calculations and measurements are mostly approximations and estimates in steady-state operation. This steady-state thermal analysis, however, implies the existence of transient or time-dependent thermal analysis, which is complete with thermal capacitances and impedances and distributed models… all of which are outside of the scope of any one blog post! Take a deep breath. All of our reported thermal data and values will serve us well for now. 

In the next post in this series, we’ll take a look at available thermal management technologies. 

For more information on practical thermal modeling: 

AN-1432 (Rev. 0) (analog.com) 

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