ADRV9002
Recommended for New Designs
The ADRV9002 is a highly integrated RF transceiver that has dual-channel transmitters, dual-channel receivers, integrated synthesizers, and digital signal...
Datasheet
ADRV9002 on Analog.com
No-OS (no operating system) drivers offer high-level APIs for interfacing with digital devices. They are platform-independent, meaning they support applications with systems that don’t require an OS. No-OS leverages a platform driver layer to allow easy reuse across different hardware and software platforms without adjusting for low-level interface details.
Learn more about ADI’s no-OS drivers and how to use them.
This straightforward tutorial will guide you through integrating No-OS with your default hardware descriptive language (HDL) project. Ultimately, you will have the bones of a comprehensive FPGA-based system using the ADRV9002. The work is demonstrated on a Windows-based operating system, which we configured in the previous post of this series.
Here, we will learn how to build the Xilinx default BareMetal application for the ZCU102 hardware/software design platform. Then, we'll see how to integrate it with the default HDL for ADRV9002, specifically. Before starting, make sure you have the following:
1. Install Git:
Download and install Git from https://git-scm.com/download/win.
2. Prepare Build Environment:
Create a directory where you want to build the No-OS project.
3. Export SDK Paths:
export PATH=/c/Xilinx/Vitis/2021.1/bin:/c/Xilinx/Vitis/2021.1/gnu/aarch32/nt/gcc-arm-none-eabi/bin:$PATH
source /c/Xilinx/Vitis/2021.1/settings64.sh
4. Clone No-OS Repository:
git clone --recursive -b 2021_R2 https://github.com/analogdevicesinc/no-OS.git
5. Copy System HDF File:
Copy the system_top.xsa file from the HDL project directory to the No-OS project directory.
cd /projects/adrv9001/zcu102
6. Build No-OS Project:
make
make run
7. Launch SDK:
Open Vitis manually and browse to the project directory. Verify the built project in Vitis.
1. Copy HDL Project: Copy your default HDL project to a directory where you want to create an integrated project.
2. Run Default No-OS Project: Open Xilinx Vitis and run your default No-OS project. Verify that the project is working correctly.
3. Export Files from Vitis: Export the following files from your Vitis project to the copied HDL directory:
4. Open HDL Project in Vivado: Run Xilinx Vivado and open your copied HDL project. Then, export and launch VITIS.
5. Create a Project in VITIS: Create a new empty project in VITIS.
6. Import Files: Import the three files exported in Step 3 into the new VITIS project.
7. Add Directories: Add the required directories for the imported files.
8. Launch Project: Connect your ZCU102 to the PC and launch the project.
Fig 1 . Default HDL view
Fig 2. Xilinx Vitis application view
Now that you’ve successfully integrated No-OS with your default HDL project, you can begin developing your FPGA-based system around the ADRV9002. The next post will demonstrate “How to Run Default Kuiper Linux on ZCU102.”
For further learning about today’s topic, see the videos “How to Build No-OS Default for ZCU102 FPGA with ADRV9001 | Complete Guide” and “Integration of HDL with No-OS ADRV9001” on the TechXORT YouTube channel.
Read more: The complete "Technology for eXtreme Optimization and Real-Time" blog series.
