Close-up of a credit card RFID chip, which uses a form of PSK modulation.

Digital Signal Modulations with Phase Shift Keying (PSK): Modulation Schemes Part 5 of 7

Modern communications have increasingly adopted phase shift keying (PSK) to imprint digital messages onto a carrier. Now that we’ve covered amplitude shift keying (ASK) and frequency shift keying (FSK), this blog will round out our journey through the basic modulation schemes.

PSK signal = A(t) . Sin(2π.f(t) + ɸ(t))

PSK is similar to FSK because both act on the argument or angle of the carrier sinusoid. In a simple binary PSK (B-PSK) scheme, the phase of the carrier switches between two possible angles according to the data bits 1 or 0. Figure 1 gives an example of such a two-level scenario, where a bit 1 causes a phase shift of 0° and a bit 0 causes a phase shift of 180°.

 B-PSK signal, where (a) represents the digital signal flow, (b) is the carrier wave, and (c) is the modulated B-PSK signal.

Figure 1: B-PSK signal, where (a) represents the digital signal flow, (b) is the carrier wave, and (c) is the modulated B-PSK signal. Public domain
 

Increasing Symbol Rate with Quad-Phase Shift Keying (QPSK) and Beyond

As seen for ASK and FSK, it’s possible to code more bits into one “shot” to increase the data flow by a factor of 2, 4, 8, or more. The resulting data rate will be higher than just bit rate: we speak then about symbol rate.

If the angle deviations can be among four equally spaced values (ex. O°, +90°, +180° and +270° or +45°, +135°, +225° and +315°), then we will have a 4-PSK or quad-phase shift keying (QPSK) modulation. By extension, one can design a PSK modulator or demodulator with 8 different symbols, 16 symbols, up to 512 or 1024 symbols.

 Figure 2: 4-PSK or QPSK modulated signal.

Figure 2: 4-PSK or QPSK modulated signal. CC via Wikimedia Commons

Of course, as already seen for ASK and FSK, symbols get closer together as the symbol count increases. In PSK, the symbols represent different phases or angles, and overlap can occur if there are only few degrees between them. This is exacerbated by real-world factors such as component imperfections, noise and interference, etc., which increases the bit error rate (BER) and can corrupt the data received.

  • In QPSK, one symbol transports 2 bits, giving a bit rate of Fb = 2*Fs.
  • In 8-PSK, the symbol is made with 3 bits, so the bit rate = 3*Fs.
  • In 16-PSK, Fb = 4*Fs, etc.
  • In n-PSK, Fb = Log2(n) * Fs
     

PSK bandwidth

As with ASK and FSK, PSK bandwidth occupation is theoretically infinite, but it’s limited because almost all of the power is concentrated between -1/Ts and +1/Ts  (the first main lobe), with Ts being the message symbol duration. In the case of a simple BPSK, Ts=Tb where Tb is the bit duration; therefore, bandwidth equals 2/Tb.
  

Diagram showing BPSK Bandwidth Occupation
Figure 3: BPSK Bandwidth Occupation 

PSK Modulation Implementation

In a BPSK modulation where the two symbols are separated by 180°, phase difference is easy to build. Two sinusoids delayed by 180° to each other are inverted:

Equations for BPSK carriers before and after modulation

Figure 4: BPSK carriers

One possible implementation could be to use a 2-position multiplexer switching from a carrier or its inverse. The selection is controlled by the message bit flow (Figure 5). But switches can introduce uncontrolled delays and noises, resulting in a mediocre BSPK signal.

 Circuit diagram of a BPSK modulator using multiplexer

Figure 5: BPSK modulator using multiplexer

Instead of using two separate carrier sources, the inversion of the carrier can be ensured by the bit flow in a multiplier. The message data must be polarized between as +V (for bit 1) and -V (for bit 0): these values are converted as +1 and -1 before to be entered in the multiplier (as seen in Figure 6).

 Diagram of a multiplier implementation for BPSK modulation

Figure 6: BPSK modulator using multiplier
 

PSK Demodulation

A multiplier can also be used to build a PSK demodulator, along with a carrier at the same central frequency (Figure 7). With BPSK = A.Sin (ωt + ɸ(t))  and the internally generated carrier frequency B.Sin(ωt), we have, after developing the product of two sinewaves:

A.Sin (ωt + ɸ(t))  . B.Sin(ωt) = ½ A.B.[cos (ωt+ɸ-ωt) – cos(ωt+ωt+ɸ)] = ½A.B. [cos (ɸ) – cos(2ωt+ɸ)]

This gives us a DC value ɸ and a frequency 2ω, which is far from DC and can be easily filtered out. For QPSK and higher symbol schemes, modulators and demodulators circuits become more complex.

 Diagram of a BPSK demodulator using multiplier and low pass filter

Figure 7: BPSK demodulator using multiplier and low pass filter
 

Particular PSK

There are various PSK forms, all derived from the basic BPSK.

M_ary PSK such as M-PSK where M =2, 4, 8, 16, 32… We call it BPSK when N=2 and QPSK when M=4. These have been well covered earlier in the post.

Differential BPSK and QPSK (DBPSK, DQPSK) changes the phase relative to the previous angle state rather than from an absolute value of the bits 1 and 0. The bit 0 tells the carrier to add 0°, corresponding to no phase change, while bit 1 indicates to add +180°. However, when one has a long sequence of 0, there is no phase change to the carrier, while a long sequence of 1s will cause the carrier phase to change systematically.

Figure 8: Typical DBPSK modulation.

Offset QPSK (OQPSK) is derived from the classic four-phase QPSK. It reduces noise, and hence BER, by adding intermediate steps into angle jumps greater than 90°. For example, to jump from 135° to -45°, an intermediate step would be inserted at 45° for a half-bit duration.

 Graphs showing Typical QPSK phases sequence (left) with OQPSK transformation (right).

Figure 9: Typical QPSK phases sequence (left) with OQPSK transformation (right). CC via Wikimedia Commons. Layout adjusted to provide side-by-side comparison.
 

Summary

With this episode, we have completed the overview of fundamental digital modulations. In the next episode, we will discuss combined schemes that form more complex modulations. For example, quadrature and amplitude modulation (QAM) allows higher data flows by modulating both amplitude and phase, since the symbols transport more bit information.
 

Further Reading

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  • Many thanks  ! Good catch! Since switching the carrier phase as 0° and 180° corresponds to multiplying the carrier by +1 (thus keeping the phase as 0°) multiplying the carrier by -1 (thus inverting the phase by 180°), the data flow is thus a signal at +V or -V. Before making the multiplication, the +V and -V are simply +1 or -1. Concerning the differentiation with figure 5 (using multiplexer (thus switches), the first approach is more problematic because it's much more difficult to be synchrone (when one has to switch to 180° phase, the selected carrier might occur far away for the wanted 180°. In fact the original figure 5 was made by 2 independent oscillators (one being 180° phase from the other)

    Thanks to your remark, I add the correction and clarification for the figure 6..

  • Hi KCC. I think for the line explaining Fig. 6, you meant to say that the message must be polarized between -V and +V, and not +1 and +1.
    Also, regarding using a multiplier in Fig. 6 vs switching multiplexer in Fig. 5, could you detail how the multiplier is implemented that makes it different from using switches? I'm imagining a traditional Gilbert cell mixer, but that would be "switching" too, and hence have uncontrolled delays and noise as you mention.

  • I have read entirely the document: OK for me!