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ADE9000 – Current channels drifting 853–1127 ppm/°C while voltage channels remain stable

Thread Summary

The user observed significant thermal drift (853–1127 ppm/°C) in the current channels of two ADE9000 units, while voltage channels remained stable. The issue was resolved by adding 10kΩ resistors from each CT output pin to AGND, reducing drift to ~18.4 ppm/°C. The root cause was the floating common mode of the HIOKI 9660 CT outputs, which interacted with the PGA input bias current over temperature. The solution aligns with the recommendations in UG-1098 (Rev.A) for fixing common mode to 0.
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Category: Hardware
Product Number: ADE9000

We are developing a three-phase energy analyzer using the ADE9000, and we have observed a consistent and reproducible thermal drift issue exclusively on the current channels.

Setup:

  • Two independent ADE9000 units purchased from DigiKey — both exhibit identical behavior
  • Current source: HIOKI 9660 clamp sensor, 1 mV/A, internal burden, 2 Ω output impedance, located 50 cm from the chip
  • Input signal level: approximately 120 mV RMS on both current and voltage channels

Observed behavior:

  • Current channels drift: 853–1127 ppm/°C
  • Voltage channels: completely stable across the same temperature range
  • This asymmetry is consistent across both chips and all three current phases

Troubleshooting already performed:

  • Thermal pad verified — ΔT = 0.2°C, negligible
  • Internal voltage reference measured stable at 1.2493–1.2498 V across temperature
  • Crystal replaced — noise improved slightly but drift persisted
  • AVDDOUT measured at 1.921–1.924 V with a +0.15 mV/°C coefficient

The drift magnitude is 45x above the ±25 ppm/°C maximum specified in the datasheet. Since both chips show identical behavior and the signal source is a precision laboratory instrument with negligible output impedance, we believe this points to a systematic internal difference between the current and voltage channel datapaths.

Question: Is there any known architectural difference between the current and voltage ADC channels that could explain this asymmetry? Is there an errata or application note addressing this behavior?

Parents
  • The ADC are identical for Voltage and current. Can you show how the current sensor is connected to the current channel ADC from sensor to ADC inputs. Are you grounding one side of the current sensor? Have you measured the ADC inputs to see if it is drifting over temp?

    in technical Ref manual UG-1098 (Rev.A) pg 5   The center tapped burden fixes the common mode to 0.

    Another option is single ended. This requires one leg to be grounded to fix the common mode to 0.

    Dave

  • Dave, the fix worked perfectly. Here are the results:

    Before (floating common mode):

    • Current channels drift: 853–1127 ppm/°C
    • Voltage channels: stable

    After (6 × 10kΩ resistors from each CT output pin to AGND):

    • All three current channels: ~18.4 ppm/°C
    • Full temperature sweep from 15°C to 30°C
    • All three phases consistent and stable

    The measured system drift of 18.4 ppm/°C is well within the ±25 ppm/°C maximum specified in the datasheet, and this figure includes the entire signal chain — ADE9000, voltage dividers, and current sensors.

    The root cause was exactly what you pointed out: the HIOKI 9660 CT outputs are floating, with no common mode reference to AGND. Without the center tap, the PGA input bias current interacted with temperature, causing the drift exclusively on the current channels while the voltage channels remained stable.

    Two weeks of investigation, two ADE9000 units tested, and the fix was six resistors. Thank you for your guidance — we would not have found it without your expertise.

Reply
  • Dave, the fix worked perfectly. Here are the results:

    Before (floating common mode):

    • Current channels drift: 853–1127 ppm/°C
    • Voltage channels: stable

    After (6 × 10kΩ resistors from each CT output pin to AGND):

    • All three current channels: ~18.4 ppm/°C
    • Full temperature sweep from 15°C to 30°C
    • All three phases consistent and stable

    The measured system drift of 18.4 ppm/°C is well within the ±25 ppm/°C maximum specified in the datasheet, and this figure includes the entire signal chain — ADE9000, voltage dividers, and current sensors.

    The root cause was exactly what you pointed out: the HIOKI 9660 CT outputs are floating, with no common mode reference to AGND. Without the center tap, the PGA input bias current interacted with temperature, causing the drift exclusively on the current channels while the voltage channels remained stable.

    Two weeks of investigation, two ADE9000 units tested, and the fix was six resistors. Thank you for your guidance — we would not have found it without your expertise.

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