We are developing a three-phase energy analyzer using the ADE9000, and we have observed a consistent and reproducible thermal drift issue exclusively on the current channels.
Setup:
- Two independent ADE9000 units purchased from DigiKey — both exhibit identical behavior
- Current source: HIOKI 9660 clamp sensor, 1 mV/A, internal burden, 2 Ω output impedance, located 50 cm from the chip
- Input signal level: approximately 120 mV RMS on both current and voltage channels
Observed behavior:
- Current channels drift: 853–1127 ppm/°C
- Voltage channels: completely stable across the same temperature range
- This asymmetry is consistent across both chips and all three current phases
Troubleshooting already performed:
- Thermal pad verified — ΔT = 0.2°C, negligible
- Internal voltage reference measured stable at 1.2493–1.2498 V across temperature
- Crystal replaced — noise improved slightly but drift persisted
- AVDDOUT measured at 1.921–1.924 V with a +0.15 mV/°C coefficient
The drift magnitude is 45x above the ±25 ppm/°C maximum specified in the datasheet. Since both chips show identical behavior and the signal source is a precision laboratory instrument with negligible output impedance, we believe this points to a systematic internal difference between the current and voltage channel datapaths.
Question: Is there any known architectural difference between the current and voltage ADC channels that could explain this asymmetry? Is there an errata or application note addressing this behavior?

