Voltage dividing resistor value

Hi,

The circled cap and resistor are the anti-aliasing filter. It forms a -3dB corner at 1/(2*pi*R*C). Typically they are set around 7kHz maybe a bit lower for energy metering applications, but it depends on the sampling frequency and bandwidth of interest where you want to set the corner.

Ideally, those filter corners to match on all the ADC inputs.

I'm guessing with the resistor change, the original cap value remained, and the voltage pin now has a LPF with a ~629Hz corner. You might have some attenuation of the input signal happening in the bandwidth of interest.

Keeping the resistor being measured across typically has a benefit of less thermal noise, but I don't think that would lead to gross inaccuracies. 

Regards,

Jason  

Hi, Jason

Thank you for your feedback. I now have a better understanding of the anti-aliasing filter.

So far, I have performed voltage measurements under the following four conditions.

Based on these results, I would like to ask some additional questions.

Condition 1: Using the original component values.
Condition 2: Using the component values described in the previous question.
Condition 3: Adjusting the anti-aliasing filter to bring the corner frequency closer to the original design.
Condition 4: As a trial, adjusting the resistance of R10A to be closer to the original value.

<Question 1>
Even though the anti-aliasing filter was adjusted in Condition 3 to match the original corner frequency,

the measurement error is still large. What could be causing this?

<Question 2>
Would it be better to fix R10A at 1kΩ and determine the voltage divider ratio accordingly?

I’d appreciate any advice or suggestions you may have.

XLSX

If you plot linearity, it might be useful. So take measured/expected-1 for a percentage. You're pretty consistently -66% for condition 3. Then you are -33% for condition 4. I would guess something in voltage scale or gain settings being off. 

Thank you very much for your prompt response to my inquiry.

Following your suggestion, we checked the linearity.

As you mentioned, the values were approximately 6% lower in Condition 3 and about 3% lower in Condition 4.

I feel that the error in the ADC output code is directly linked to the error in the voltage measurement.

We are using high-precision resistors for the voltage divider, so I believe the issue may lie elsewhere.

If there are any configuration parameters that I might have overlooked which could cause significant ADC output error,
I would greatly appreciate it if you could point them out.

XLSX