ADE9153A event interrupts

Hi,

The IRQ pin behavior can be configured in the mask register (address: 0x405) by setting the appropriate bits. ISR servicing should include reading first the Tier1 status (address: 0x402) register then if a bit set (in your case is event_stat bit), reading Tier2 register (which in your case is event_status register (address: 0x04c1)) will to identify the source of the trigger. Please note that Tier1 register can be cleared by writing 1 to its appropriate bit while Tier2 is cleared once read.

 dlath  Derek 

Thank you for your prompt reply. I think this is making sense. 

It appears that I can have multiple events that trigger the IQR pin. When the IQR pin goes off, I immediately read data sent from UART or SPI, which contains the source of the trigger. To identify the source of the trigger, you find which bit has been switched from 0 to 1. The Arduino library should help with the rest. Thanks.  

Thank you for your prompt reply. I think this is making sense. 

It appears that I can have multiple events that trigger the IQR pin. When the IQR pin goes off, I immediately read data sent from UART or SPI, which contains the source of the trigger. To identify the source of the trigger, you find which bit has been switched from 0 to 1. The Arduino library should help with the rest. Thanks.