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ADE9000 IRQ1 Interrupt is not triggered

Category: Software
Product Number: ADE9000


I am using ADE9000 IC since 2 years. Now I am trying to enable the DIP,SWELL and Overcurrent interrupt over IRQ1 pin. I have read in datsheet like  There is an option to combine all the interrupts onto a single interrupt pin, IRQ1, instead of using two pins, IRQ0 and IRQ1. To activate this option, set the IRQ0_ON_IRQ1 bit in the CONFIG1 register. Note that the IRQ0 pin still indicates the enabled IRQ0 events while in this mode, and IRQ1 indicates both IRQ1 and IRQ0 events.

I did same settings in my code flow but always getting status on IRQ1 pin is low. I was wonder that my IRQ1 pin is getting always low but still interrupt is not get triggered. It should be High while power on but always low. 

Kindly go through my source and let me know. Our production team is ideal due to this issue.

Follwed follwing sequence for Enable the interrupt and monitor:

//Enable the masking registers

 AFE9000_Write_Para(MASK1_HIGH, MASK1_LOW, 0x03F20000, 6);

//Setting Zero Crossing Source for High pass filetr disable, ZX detection and Which sample to be use, \
//Enabling LPF for AP and RP by writing zero \
//Register: CONFIG0(32 bit), Bit:HPFDIS(3), ZX_SRC_SEL(6), RMS_SRC_SEL(7), DISAPLPF(12), DISRPLPF(13)
AFE9000_Write_Para(CONFIG0_HIGH, CONFIG0_LOW, 0x00000000, 6); 

//Setting Corner frequency for HPF filter \
//Register: CONFIG1(16 bit), Bit: iRQ0_ON_IRQ1(12), Bit: DIP_SWELL_IRQ_MODE(12)
AFE9000_Write_Para(CONFIG1_HIGH, CONFIG1_LOW, 0x1400, 4); 

//Setting Corner frequency for HPF filter \
//Register: CONFIG2(16 bit), Bit: HPF_CRN(11:9)
AFE9000_Write_Para(CONFIG2_HIGH, CONFIG2_LOW, 0x0000, 4); 

//Setting Zero Crossing Signal, Line period select \
//Register:ZX_LP_SEL(16 bit),Bit: ZX_SEL(2:1), LP_SEL(4:3)
AFE9000_Write_Para(ZX_LP_SEL_HIGH, ZX_LP_SEL_LOW, 0x001E, 4); //0000 0000 0001 1110

//---------DIP Voltage setting-------------------------------------------------------------------

//DIP_THRESHOLD: 0x23773B (15V)

//---------SWELL Voltage setting-------------------------------------------------------------------

//SWELL_THRESHOLD - 0xaf81bf ( 70V)

//-------------------OVER CURRENT SETTINGS------------------------------------------------------------
//Setting Config3 register for OVER current monitoring \
//Register: CONFIG3(16bit), Bit: OC_EN(15:12) \
//Enabling detection of OC from all phases
AFE9000_Write_Para(CONFIG3_HIGH, CONFIG3_LOW, 0xF000, 4);

//Setting OILVL register and putting Threshold value \
//Register: OILVL(32bit), Bit: OILVL_VAL(23:0) for 10A \
//Ref. ADE9000-UG-1098, PG-30  -   OI_THRESHOLD :  0x3696C0 (2A)

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