I'm currently working on an implementation of the ADE7816. At it's current state, I've been able to calibrate and configure the chip for RMS readings and power. I'm now trying to utilize the HSDC interface to gather instantaneous waveform data for voltage and data.
Per the datasheet, I've tested different variations of the HSDC_CFG register to implement a method to read the data from the ADE and parse it to retrieve useful data.I've noticed, however, some strange behavior by the HSDA line of data.
Seemingly at random, the data line chooses to rest high or low. For reference I'm testing at 4MHz so my scope can accurately visualize the data stream.
Here, you can see what I'm viewing on my o-scope. CH1 (yellow) is on clock and CH2 is on MISO:
Here you can see that the data line is held high.
and here the data line is held low.
For what it's worth, I've configured the HSDC_CFG register with a hex value of 0x09 signifying:
Looking at captures, the data line seems to decide at random to hold at high or low. If this is normal behavior, I understand. I had just assumed the data line would hold on one state rather than choose between the two at random.
I'd be happy to provide any other information as necessary.