We are using the AD73360L as AFE for a industrial product. We have found that if the unit has been left unpowered for +10 minutes and powered up again that there is a offset on one or two of the channels. We investigated this more by putting the unit in a oven to heat it up, where we found that the offset stayed the same. But when cooling the unit and then powering it up, there is a offset on our values. This offset does disappear after the unit is left running for 30-40minutes.
The unit was calibrated both offset and amplitude. We calibrate the offsets by letting the unit run for a minute or two to get the temperature to settle. Then without injecting any current we calibrate the each channels offset by taking the sum of 640 samples and dividing it by 640 to get a average offset value. The ARM doing the calibration also takes a 1000 samples to calculate the average offset value and they correspond.
It is just very interesting to us that the offset is a bit bigger when the unit is left switched off and then switched on (especially only on one or two channels). Then after being switched on for a few minutes the offset drifts back to zero.
We are using the AD73360 in full differential mode and sampling at 32 kHz. We did our layout as close as possible to examples and reference designs we could find on the AD76330. Is there anything we are missing? We first noticed this without cooling the unit in a cooler. But to make sure it is temperature effected we took it to extremes but never more than was specified in the datasheet.
We have changed the anti-aliasing filter and even took it off but got the same offset drift. Once it settles (after 30-40minutes) it stays stable. But then we switch the unit off and leave it off for +10 minutes and switch it back on and the offset is there again.
Any help or ideas would be appreciated.
Quintin van Wyngaardt
Sorry about the delay, since this was originally posted in a different section we weren't directly notified. I will help you out with this problem.
First off, is this still an issue?
I'll move this thread to the Energy monitoring and metering community. Someone here should be able to respond to your inquiry.
If it is, then my next question is, are you using CT's as the current sensors in the application?
From the description of the issue, it sounds like it could be a capacitor that is the problem. In particular C38, 39, 42, 43, 46, 47, 50, 51, 54, 55, 58, and 59, all the capacitors in series with the input signal path. One good test for that would be to short VINPx and VINNx, to see if the offset still exists. Or by shorting out the caps listed, this should be ok if Current Transformers are used as the current sensor.
Thanks for the reply, sorry for only replying now. I didn't set the discussion up to notify me.
We are using CTs but we have taking everything out of the equation by shorting the VINPx and VINNx like you mentioned too and the offsets still existed.
We have found anomalies in the BF51xF's datasheet to do with the SPORT port but we are not entirely sure if they are what is causing the offset. We have also done a new PCB layout where we moved the ADC much closer to the SPORT on the DSP and also improved the layout a lot. We are waiting for our PCB's to be assembled and I will then get back to you on how it performs.
We did pick up that touching the SPORT lines did induce noise on the data. So basically we noticed that the SPORT had an effect on the data. Digital noise being introduced.
The new PCB's with the ADC closer is a bit better but still has an offset when the temperature changes. I think we need to engage on a different level. Can I maybe send you a copy of the PCB layout and schematic? It feels like we are missing something here and we do need help from Analog.
I can fill-in for dlath and help you further.
I looked at the above posts and I have a few questions for you:
1. When you mention 'offset', I am assuming you mean DC offset (or do you mean inaccurate results)? The DC offset is specified to be within +30mV over the entire temperature range from -40C to 85C, at PGA=0dB mode. Are you saying that the DC offset for certain ADCs after power-up is more than this limit?
2. I can see that the DC offset varies over time in your case, which is definitely not expected. How much is this variation? How much variation over temperature do you see? Can you provide some numbers here, like average ADC code in each case?
Can you attach the PCB layout and schematic here? I will review it and get back to you.