DMA error conditions

Q 

I am using a peripheral DMA channel and I am observing a DMA error after I run
my application for sometime. The DMA_ERR bit in the DMAx_IRQ_STATUS register is
set to 1.

What could be the possibilities for the the above error?

 

A 

There could be several reasons to get a DMA error. A brief
description of the error conditions is provided in the Hardware Reference
Manual for each processor family in the DMA chapter.

Here is a breif description from the Hardware Reference Manual:

The following error conditions are detected by the DMA hardware.
- A disallowed register write occurred while the channel was running.
Only the DMA_CONFIG and IRQ_STATUS registers can be written
when DMA_RUN = 1.

- An address alignment error occurred during any memory access.
For example, DMA_CONFIG register WDSIZE = 1 (16 bit) but address
LSB is not equal to 0, or WDSIZE = 2 (32 bit) but two address LSBs
are not equal to 00.

- A memory space transition was attempted (internal to external or
vice versa). For example, the current DMA address (CURR_ADDR)
crossed the 0xF000_0000 boundary, or the current descriptor
pointer (CURR_DESC_PTR) crossed the 0xF000_0000 boundary.

- A memory access error occurred. Either an access attempt was
made to an internal address not populated or defined as cache, or
an external access caused an error (signalled by the external memory
interface).


Also note that some prohibited situations are not detected by the DMA hardware.
No
DMA abort is signalled for the following situations.
- DMA_CONFIG direction bit (WNR) does not agree with the direction of
the mapped peripheral.
- DMA_CONFIG direction bit does not agree with the direction of the
MDMA channel.
- DMA_CONFIG word size (WDSIZE) is not supported by the mapped
peripheral.
- DMA_CONFIG word size in source and destination of the MDMA
stream are not equal.

- Descriptor chain indicates data buffers that are not in the same
internal/external memory space.
- In 2D DMA, X_COUNT = 1.

For more details on the DMA errors and howto handle error conditions refer to
the Hardware Refernce Manual.