vdk+lwip ethernet communication

In addition to above I would like to ask further that how to create my own functions to open, write, read or close the socket for ethernet communication in an vdk+lwip application? I've already read documents EE-312, lwip user guide, kernel api, sockets api, BF537EthernetDeviceDriverDesign. My requirement is to transmit large amount of data in chunks of 4096/8192 bytes, from my custom board (bf527 based data acquisition) to a PC (with a labview GUI application for ethernet communication ).

Hi,

LwIP can be configured depending on your application requirements. LwIP is statically configurable, and most of the options can be changed in 'lwipopts.h' present in "...\Blackfin\lib\src\lwip\contrib\ports\adsp-blackfin\proj\lwipv4lib\". A modified version, 'lwipopts.big.h', is provided for applications that potentially transfer large amounts of TCP data. Some critical changes in 'lwipopts.big.h' from that of the default 'lwipopts.h' include:

-RAM size increased from 64K to 1MB
-TCP window size increased from 8K to 32K
-Send Queue Length changed from 16 to 256.

In order to use 'lwipopts.big.h' you must do the following:

1)Create a backup of the original 'lwipopts.h' file, and replace it with a renamed lwipopts.big.h

2)Recompile the required LwIP Library, which is located in "...\Blackfin\lib\src\lwip\contrib\ports\ADSP-Blackfin\proj\lwIPv4lib\".

3)Create a backup of "...\Blackfin\lib\liblwIPBF5xx.dlb", where "xx" corresponds to the processor in hand.

4)Copy 'liblwIPBF53xx.dlb' from the "...\Debug\BF5xx\" directory to "...\Blackfin\lib\"

5)Open your application in VisualDSP++. Enlarge the Ethernet Stack size via the define to "#define ETHER_STACK_SIZE 1024*1024*2" in 'lwip_sysboot_threadtype.c'. Your VDK LwIP stack should also be set to at least this value, preferably to 4MB. You will also need to ensure you have enough SDRAM available for this, as the stack is stored in SDRAM.

Please ensure that, The number of bytes doesn't exceeded the allocated space for the buffer.

Also, There are some VDK Examples which do not require Hardware, located at "...\Blackfin\Examples\No Hardware Required\VDK\", and there are LwIP examples given for each of our Blackfin EZ-KIT Lites under "...\Blackfin\Examples\<EZ-KIT Lite>\LAN\" and "...\Blackfin\Examples\USB-LAN EZ-EXTENDER\LAN\".

The libraries provided for Blackfin uses VDK as the underlying kernel for managing the stack. With the source code being made available to public, user can modify the same for their requirement.

All Blackfin related code/doc can be found here:
....\VisualDSP 5.0\Blackfin\lib\src\lwip

You can refer the below ezone threads which might be helpful to you.
ez.analog.com/.../204461

If above information doesn't satisfy your need, Could you please share us the below details. This will help us to assist you further.

1.As you mentioned that you are unable to transfer more than around 400 bytes using FS_write, can you please confirm whether your facing any error message or any data losses during transmission. Let us the know the exact behavior you are observing during transmission.

2. Please confirm whether you have tried the example project "FileServerStdio" available in the below VDSP installation directory. If so, have you modified any source code in that?
[installation]\Analog Devices\VisualDSP <version>\Blackfin\Examples\ADSP-BF527 EZ-KIT Lite\LAN\FileServerStdio

Also, can you please try with the "FileServerStdio example code without doing any modification. And let us know the result.

3. Please describe your test setup - connection between PC to custom board, PC configuration during data transmission and VDSP version you are using.

4. If you have an access to ADSP-BF527 ez-kit, can you please try on that and let us know how you gets on.

5. If your facing issue only with specific project, could you please share us the project along with steps and screenshots to simulate your issue in our side.

6. Also, please confirm whether you are facing same behavior when trying on other PC's too.

Regards,
Santhakumari.K

Thankyou for your reply!

I would try the tips provided by you and share the results. 

I tried to transmit by running a for loop 10 times transmitting 400 bytes in each cycle. It transmits 400 bytes only once which is well received by PC and then I get error as DMA underrun by reading EMAC_TX_STAT register. Also TX_OK bit resets ('0'). 

As per the lwip user guide dma underrun should not happen if CDPRIO bit in EBIU_AMGCTL register is set. This i checked in lwip_sysboot_threadtype.c where the bit is set as required. so y dma underrun?

Interestingly, then I tried in the same for loop one write call and next one read call i.e. 10 write, 10 read then it works, also if I fclose and then fopen after each 400 byte transmission again it works. I am sorry if I sound complicated.... maybe it is related to better understanding of tcp handshake (i may have to read). 

Anyway, as per your good suggestion I would try with example project "FileServerStdio" (I've used it in my project without modifying the source code) and then let's see..

regards

sandeep 

Hi Sandeep,

Regarding DMA underrun error, If processing code and TX buffer are both in external memory, then the Blackfin processor by default gives the core priority over DMA when both are making simultaneous accesses.

Therefore, DMA underrun error can avoid by prioritizing DMA accesses over the Core for memory accesses. As you might known, It was done by setting the CDPRIO bit in the EBIU_AMGCTL register.

Also, it seems that adding VDK has added more memory footprint and likely pushed some of your more executed code/data in external memory. This probably is causing excessive page misses, resulting in underruns. So you would likely have to remap your code and data sections to minimize external memory use.

We would also suggest you to refer the “DMA Traffic Control” and "Urgent DMA" sections described in the EE-324 which describes, Optimization Techniques for Blackfin® Processors.
www.analog.com/.../EE_324_Rev_1_07_2007.pdf

For more details could you please go-through below link:
ez.analog.com/.../ppi-buffer-underun-with-lcd-at-vdk

As LwIP uses the DDR memory space and hence we suspect that, the wrong configuration of EBIU may also cause it not to function in the way expected.

As you are using a custom board, could we ask you to review the EBIU settings for SDRAM to ensure your custom board support file is setting up the EBIU correctly. As of VisualDSP++ 5.0 we added 'custom board support', which allows you to associate a custom XML file with your session to ensure that the EBIU is configured appropriately.

You must use the xml files located in "\Program Files\Analog Devices\VisualDSP 5.1.x\System\Archdef\adsp-bf527-proc.xml- to configure certain registers on the target.

If you take a look at the very bottom of the xml file, in the <register-reset-definitions> section, you will see that it configured the EBIU registers to specific values. These values are set appropriately for the SDRAM part used on the EZ-KIT Lite. Since you are using a custom board, these values will (almost certainly) not be suitable for your target. To allow users with custom boards to configure the EBIU, . This allows you to create a separate XML file to handle the register resets to ensure that the EBIU gets configured appropriately for the SDRAM part used on your custom board.

Please see the help under 'Help'->'Contents'->'Graphical Environment'-.>'Custom Board Support'.

Regards,
Santha kumari.K

I tried to execute my project on EZ-KIT Lite for BF527 and there I am not getting any dma under/over run but still it is not transmitting all data blocks (400 bytes) in the for loop. some blocks are missed!! Also even when I am executing on my custom board I find EBIU register settings are proper in adsp-bf527-proc.xml. If this issue is related to proper mapping of all the files (C++ & assembly) of the project into internal and external memory, then I would like to know how to make mapping of my code/project more effective? I have already read "vdsp linker and utilities manual" and EE324 "system optimization techniques" but still not have clue what steps I need to take so that DMA is able to transfer all data blocks properly on ethernet? Do i need to work on my project .ldf file or cplb file?

regards

Sandeep B

Hi Sandeep,

You can refer the below threads which might be helpful to you.

ez.analog.com/.../254533
ez.analog.com/.../lwip-fragmentation-and-reassembly
ez.analog.com/.../210704

Also as we already asked previously, Could you please share us the below details. This will help us to assist you further.

1. Please confirm whether you have tried the example project "FileServerStdio" available in the below VDSP installation directory. If so, have you modified any source code in that?
[installation]\Analog Devices\VisualDSP <version>\Blackfin\Examples\ADSP-BF527 EZ-KIT Lite\LAN\FileServerStdio

Also, can you please try with the "FileServerStdio example code without doing any modification. And let us know the result.

2. Please describe your test setup - connection between PC to custom board, PC configuration during data transmission and VDSP version you are using.

3. If you are facing issue only with specific project, could you please share us the project along with steps and screenshots to simulate your issue in our side.

4. Also, please confirm whether you are facing same behavior when trying on other PC's too.

Best Regards,
Santhakumari.K