ADSP-SC589-EZ and SigmaStudioPlus

Hello BN,

Sorry for the inconvenience.

I can simulate all three issues that you mentioned here.

I will move this query to the respective forum (Sigmastudio for SHARC) and alert that respective support person to have a look at this.

Regards,

Harish

Hi BN,

We will check with our internal team and get back to you with an update..

Thanks

Hi BN,

Regarding 384Kz, Could you please share your clocking scheme from the DSP to SPORT, as well as from the ADC to DAC?
Also, could you please confirm whether you are using an evaluation board or a custom board?

Thanks

Hi,

I am not sure how to answer the question about "clocking scheme".

I am using an evaluation board, ADSP-SC589 EZ with a BRKOUT PCB to access the DAI_PINs.

I have a piggy-pack PCB on the BRKOUT of my own design, with buffers and adjustable timing circuits for FS and BCLK.

From the piggy-back PCB I have a short flat cable to feed the I2S (BCLK, FS, D0, D1 and D2) to a PCB with three 2-channel DACs.

I am using the internal 24.576MHz clock.

I am using two I2S inputs/sources, one is the on-board SPDIF and the other is an external USB XMOS interface.

This is my PIN configuration:

P5-87 DAI1_PIN01 I2S DATA0 out
P5-89 DAI1_PIN02 I2S BCLK out
P6-29 DAI1_PIN03 MCLK out (not used)
P5-88 DAI1_PIN04 I2S FS out
P5-32 DAI1_PIN05 I2S DATA1 out
P6-92 DAI1_PIN06 Analog TDM (not used)
P5-90 DAI1_PIN07 I2S DATA2 out
P6-30 DAI1_PIN08 USB DATA in
P6-91 DAI1_PIN09 USB BCLK in
P5-31 DAI1_PIN10 USB FS in

The USB I2S input is connected to a ASRC via DAI1_PIN13.

I am not using any ADC, I have disabled the init code for the on-board ADC since it was giving me interference on DAI1_PIN07, unclear why. Maybe I have missed something in the SRU setup.

Does this answer your question?

Background:

When I was using SigmaStudio 4.7 and CCES 2.11.1 I had modified the code with help from support, to enable sampling frequency up to 192kHz. The I2S output sampling rate to the DACs was following the SigmaStudio 4.7 setting, e.g. if I selected 96k in the SS project, the output SR was 96k, and similar for any other SR selected in the SS 4.7 project.

In SS 4.7 I could set 384kHz in the project but then I got no output since I had originally no support for it in the code. After a discussion with processor support I realised that my hardware was actually supporting 384kHz, so I made an attempt to extend the code modification to 384kHz using the same methods. This made it possible to select 384kHz in the SS project and get working 384kHz SR output in Debug mode. However, Release mode was silent, no output.

Then I migrated to SSP 2.3.0 and CCES 3.0.2 to see if this would make any improvement. I have not yet implemented mods for 384kHz SR in the code since it is meaningless when 384kHz is not supported in the SSP project settings. This is why I posted this an issue in SSP 2.3.0.

BN

It seems to me SigmaStudioPlus is not used by professionals. If this was the case, these issues would have been fixed within days or weeks, not years.

Hi, 

It is now December 1, 2025. Still no update to be seen that address the issues above. Is SigmaStudio Plus a dead product?

Hi, 

It is now December 1, 2025. Still no update to be seen that address the issues above. Is SigmaStudio Plus a dead product?