SigmaStudio+ is used in dual-core mode

Hi,

Could you please share your schematic for analyzing this issue.

Thanks

Hi Chiru & Sakthivel,

Any updates for this issue?

Our schematics were so complex that one core could not run well enough. We urgently needed to use 21593's dual core. Please give us useful help, thank you.

I checked the MIPS and it didn't overshoot. It takes up about 60% of the CPU power.

Your demonstration can't download schematics online. I've shared my project with you. What experiment did you do?  Can you provide some meaningful response ??

Based on the internal discussion, support team modified your schematic for ADC input from evaluation given to all 16 channels schematic and verified the audio output which is fine. There is additionally a gain module added with each channel to listen the output, since level is low in the ADPS-21593 SOM EZ board. So, we don't think there will be any problem in SigmaStudio+ schematic. Since you are getting the issue in custom setup it's difficult to guess what could be the problem, but we will try for 16 Ch playback with A2B input and get back to you. Meantime we request you please try 16 Ch In and 16 Output in both SS+ schematic and target application, since you are using only 16 Channel in the schematic application. 
Are you using Analog Device A2B analyzer to audio stream input or any other platform application?
This analysis will help us to figure out what could be the root cause.



Amp_SS+_8In_8Out_2Core_Test_onlymute.zip

My CCES and SS+ projects work perfectly well when tested on a single core,  which should rule out DSP driver and input signal issues.

Could you share your CCES project for further testing ?

We are using the Lib Integration example which is available in SS+ installation folder which is supporting 8 Ch I/O and dual core processing.

What?  

I need is a example that can support online schematic download, and this example does not support online schematic download at all.  I have been asking this question for a long time and sharing my project with you. It seems that you have not verified my problem ??? 

Sorry, the SigmaStudio framework not supporting online download (redownload)
Execute Example Project [Analog Devices Wiki]

The project I shared with you can be downloaded online, and it is work normally when using 21593 single-core, but the problem now is that dual-core does not work properly, please help fix this bug,  do you understand?? 

Sorry, I mentioned wrong processor name in previous response as ADSP-21569, The test was on ADSP-21593 with dual core processing using the modified schematic what I have shared. We are trying to simulate this issue from our end.

Hi Johnny,

Apologies for the delay in response.

We are attaching a sample ADSP21593 Dual core Lib integration project, which supports 16CH in total.

The ADSP21593 [with attached A2B transceiver AD2428] acts as an A2B sub node. For this particular example, we have taken ADI A2B Analyzer as the main node.

In this example, the target ADSP21593, by default supports 8 DAC channels and also 8 A2B upstream channels towards A2B Analyzer main node. Kindly try this at your desk, if the default application is working, you can use this and modify based on your requirement.

The attached zip file contains the target application, the Sigma Studio Plus schematic we have used to test this application and a document mentioning which all SPORTs, DAI Pins are being used here etc.

Thankyou.

ADSP21593_A2B_SubNode_16CH.zip

Hi Sankar,

Thanks for your support.

I will test it later.  I have a preliminary look, this example still uses the way of copy schematics( 

memcpy(&oSMAPSharc0, adi_ss_smap_DiffDXESchematic_0, adi_ss_smap_DiffDXESchematic_0_size*4), 

memcpy(oSSnMemMap.pMemBlocks[1]->pMem, adi_ss_code_DiffDXESchematic_0, adi_ss_code_DiffDXESchematic_0_size*2),

Hi Sankar,

Thanks for your support.

I will test it later.  I have a preliminary look, this example still uses the way of copy schematics( 

memcpy(&oSMAPSharc0, adi_ss_smap_DiffDXESchematic_0, adi_ss_smap_DiffDXESchematic_0_size*4), 

memcpy(oSSnMemMap.pMemBlocks[1]->pMem, adi_ss_code_DiffDXESchematic_0, adi_ss_code_DiffDXESchematic_0_size*2),