Post Go back to editing

SigmaStudio framework code Memory Map for ADSP21489

Category: Software


    I have a beginner for ADSP-21489.

    And my design evironment is CCES2.11.1 + SigmaStudio 4.7 + SHARC Family Assembler

    I have some question to ask, hope you help me to understand these issue.

  No.1, Complier output like below

    I want to know what the difference between Code and CodeB, and others for Data32 - Data48 - Data32B - Data32C, what does they stand for. from the Total line, we can see some column is 0, why, and these will not be 0 in what condition.

No.2, memory map

    I have got something from others Blogs.

Memory Size:

32 Bit State   <-->   ADI_SS_SIZE_BLOCK_4

32 Bit State B  <-->   ADI_SS_SIZE_BLOCK_8

32 Bit State C  <-->   ADI_SS_SIZE_BLOCK_9

48 Bit State   <-->   ADI_SS_SIZE_BLOCK_6

Parameter  <-->   ADI_SS_SIZE_BLOCK_5

Code   <-->   ADI_SS_SIZE_BLOCK_1

Code B    <-->   ADI_SS_SIZE_BLOCK_7


Parameter       <-->   _adi_ss_mem5

Code              <-->   _adi_ss_mem1

Code B           <-->   _adi_ss_mem7

From upper SigmaStudio output, you can see some column is 0, for Data48 Data32B Data32C CodeB all 0, so can I set below block size to 0?

32 Bit State B  <-->   ADI_SS_SIZE_BLOCK_8

32 Bit State C  <-->   ADI_SS_SIZE_BLOCK_9

48 Bit State   <-->   ADI_SS_SIZE_BLOCK_6

Code B    <-->   ADI_SS_SIZE_BLOCK_7

No.3,  For current hardware system no external sdram, so can you support us a ldf without external sdram, now I don't how to set stack and heap.

No.4, If uC use UART port to control ADSP-21489, how to realize Safeload strategy.


Best regards,


  • Hi,

    Question 1: Ans
    Yes, as you mentioned there are different memory blocks assigned for SigmaStduio schematic code and data mapping. The compiler output shows that where the code, parameter and data stored for the schematic.
    Question 2: Ans
    Yes your understanding is correct about the memory blocks. Memory blocks address can be seen using generated map file of the application.
    Question 3: Ans
    The Code B(_adi_ss_mem7) and State C(adi_ss_mem9) can be allocated in some other block and make required memory size changes in SigmaStudio  "IC control settings".

    Question 4: Ans
    SigmaStudio uses SPI based packeting protocol to connect with target using communication library and communication library handles the queuing and safe load write mechanism. Safe loads write basically to write parameters before calling "adi_ss_schematic_process" function, so you may need to handle this mechanism in your application.