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Does SigmaStudio Plus v2.0 support ADSP-21565 and ADSP-21562

Category: Software
Product Number: ADSP-21565
Software Version: SigmaStudio Plus v2.0

Porting ADSP-21569 SS_App_Core1 to ADSP-21565, CCES build is fine. SS4G code and param are places in L2 as below:

   mem_L2_bw               { TYPE(BW RAM) START(0x20000000) END(0x200bffff) WIDTH(8) }
   mem_L2UC_bw             { TYPE(BW RAM) START(0x200fa000) END(0x200fdfff) WIDTH(8) }
   mem_L2BC_bw             { TYPE(BW RAM) START(0x200fe000) END(0x200fffff) WIDTH(8) }
   /*$VDSG<insert-new-memory-segments>                          */
   /* Text inserted between these $VDSG comments will be preserved */
   #if !defined(MY_SDRAM_SWCODE_MEM)
   /* 96 kB reserverd for SS4G code  */
   mem_L2_bw_SS4G_Code    { TYPE(BW RAM) START(0x200C0000) END(0x200D7fff) WIDTH(8) }   
   #if !defined(MY_SDRAM_DATA1_MEM)   
   /* 160 kB reserverd for SS4G data  */   
   mem_L2_bw_SS4G_Data    { TYPE(BW RAM) START(0x200D8000) END(0x200f9fff) WIDTH(8) }   
   /*$VDSG<insert-new-memory-segments>                          */

However, when link-compile schematic in SigmaStudio Plus, Schematic DXE generation failed:

> Compilation Started...
> DiffDXESchematic_1: Compile Started - 00:04:31 AM ==========
> DiffDXESchematic_1: Mode: Single Core
> Framework_SH0.c .... : Successful!
> SSn_SH0.asm .... : Successful!
> FrameworkUtils_SH0.c .... : Successful!
> CModulesIntern_SH0.c .... : Successful!
> CModules_SH0.c .... : Successful!
> Param_SH0.c .... : Successful!
> SubProcess_SH0.c .... : Successful!
> Schematic DXE generation failed!

> [Error el2011]  Invalid memory range and/or width for memory 'SS4SH_CODEB'
> Block outside defined memory regions

> Linker finished with 1 error 
> cc3089: fatal error: Link failed (code:1)
> SH0 Memory allocation failed!
> Error - Memory allocation failed!
> Project Compilation failed


I compare 21569 and 21565 linker map but see no difference for the code b section. Di I miss something?

ADSP-21565(NG) ADSP-21569 no sdram(OK)
Symbol Address Address
_Block0_L1_space 0x2564c0 0x252f30
_Block0_L1_space_length 0x18b40 0x1b4d0
_Block1_L1_space 0x2c5400 0x2c53a0
_Block1_L1_space_length 0x26c00 0x2ac60
_Block2_L1_space 0x300000 0x300000
_Block2_L1_space_length 0x1c000 0x20000
_Block3_L1_space 0x39b800 0x38a04c
_Block3_L1_space_length 0x800 0x15fb4
_Block_L3_code_space 0x200c0000 0x200c0000 SS codeB
_Block_L3_code_space_length 0x18000 0x18000
_Block_L3_data_space 0x200d8000 0x200d8000
_Block_L3_data_space_length 0x22000 0x22000
_Block_L2_data_space 0x20000018 0x2000360c
_Block_L2_data_space_length 0xbffe8 0xbc9f4

CCES 2.10 + SS4Sharc 4.7 does not reproduce this issue.

Does SigmaStudio Plus support ADSP-21565 ?