I am using a custom hardware board with an embedded STM32 and the ADSP-21565.
The .ldr file has been generated successfully in BSPI_SLAVE mode based on the LibIntegrationExample project available with the BSP.
A custom 2156x_init.dxe init file has been generated and integrated with the .ldr file generation after to have changed the config.h file as you can see below:
#define CLKIN (25000000) /*!< SYS_CLKIN value*/ #define CONFIG_SHARC_CORE_CLOCK (SHARC_CORE_CLOCK_1GHZ) /*!< SHARC Core Clock frequency */ #define CONFIG_DMC0 (0) /*!< Define as 0, if there is no DDR on the board or the chip*/ #define CONFIG_DRAM_TEMP (0) /*!< Choose the operating temperature range of DDR memory*/ #define CONFIG_SPIFLASH (1) /*!< Define as 0, if there is no SPI Flash on the board or the chip*/ #define EXECUTE_SAFE_STATE (1) /*!< Define as 1, if the program must go in to a safe state up on errors in the API calls*/ /*Boot related macros*/ #define CONFIG_BOOT_UART_BAUD_RATE (0) /*!< Define as 1, if the UART Baud Rate need to be recalculated and reinitialized*/ #define CONFIG_BOOT_SPI_CLOCK_RATE (0) /*!< Define as 1, if the SPI Clock Rate need to be recalculated and reinitialized*/ #define CONFIG_BOOT_OSPI_CLOCK_RATE (0) /*!< Define as 1, if the OSPI Clock Rate need to be recalculated and reinitialized*/ #define CONFIG_QUAD_DTR_BOOT (0) /*!< Define as 1, if further boot must happen in Quad mode*/ #define DO_PROCESS_BOOTSTRUCT (0) /*!< Define as 1, if there is need to process the boot struct passed by ROM*/
From the STM32 host application, I have configured the SPI and transferred successfully the .ldr file.
I checked the clocks for I2S(SCLK & WCLK) and I got the right frequencies.
After these steps, I have tried to send the generated schematic. The .h header file containing all the schematic program data has been integrated inside my STM32 host application and sent as recommended in the "SIGMASTUDIO FOR SHARC - HOST CONTROLLER GUIDE" 6.2 chapter Sending Schematic Code
SPI_CS_LOW(); send_reset_smap(); SPI_CS_HIGH(); SPI_CS_LOW(); send_reset_cmd1(); SPI_CS_HIGH(); Delay(100); // 100ms delay SPI_CS_LOW(); send_version_info_cmd2(); SPI_CS_HIGH(); Delay(10) // 10ms delay
Unfortunately, no audio output occurs but I have tested to send the same schematic from the Sigma Studio using the same hardware and the .ldr file and I got the audio output.
Here the 2 tested cases:
- 1 - When the schematic is sent from sigma studio to the SHARC target, the output is available
- 2- When the schematic is sent from the STM32 Host application to the SHARC target via SPI, NO output is available
Please does anyone has faced the same issue and could tell me tips to help me to find out the issue and fix it ?
I can provide code and schematic if needed,
Hope I have been precise, let me know if things are not clear,
Setup related information:-
Processor and Revision == ADSP-21565 rev 0.2
Complete Part Number as per Datasheet == ADSP-21565 BSWZ8 5249781.1-0.2 #2110
Hardware Platform and Version == CUSTOM HARDWARE with SHARC ADSP-21565