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Report "Allocation failed! Insufficient memory" in Sigmastudio

Category: Software
Product Number: 21565
Software Version: Sigmastudio for sharc 4.6


I'm working on a project which using the ADSP 21565 + Sigmastudio + SS_APP framework.

Now there is a compiled error in Sigmastudio when I'm trying to "Link compile download". 

Thanks for your any info.

The setting of Sigmastudio project:

1. 32 input, 34 output -- As the project has several input/output SPORTS.

2. 256 blocksize -- As there is a 3rd part algo must running in 256 blocksize. The memory is OK before set to 256 blocksize.

Error log:

The error log of sigmastudio as below-- there's not much useful information.

###### IC 1 ######

CrossCore? Embedded Studio v2.10.0
C/C++ Compiler : SHARC version (Apr 28 2021 20:29:31)
Copyright (c) 1997-2021 Analog Devices, Inc.
Copyright (c) 1998-2014 Edison Design Group, Inc.
Copyright (c) 1997-1999 Edinburgh Portable Compilers, Ltd.

Compilation status of the source files:
IC 1_xx\metadata\Framework.c .... : Successful!
IC 1_xx\metadata\SSn.asm .... : Successful!
IC 1_xx\metadata\FrameworkUtils.c .... : Successful!
IC 1_xx\metadata\CModulesIntern.c .... : Successful!
IC 1_xx\metadata\Param.c .... : Successful!
IC 1_xx\metadata\SubProcess.c .... : Successful!
Allocation failed! Insufficient memory.


1. Where can i find the useful error log?

2. What kind of memory might be running out in this case?

3. How can I fix this compile error? Reconfigure ldf? -- Additional info, the 3rd algo will use a lot of memory(about 1Mbyte). So we need to reconfigure the ldf carefully if neccessory.

Best regard.

  • Hi, 

    We recommend you to understand the memory requirements for your schematic code/data/parameter by mapping the memory sections to L3 (CodeB or DataC or ParamB) and link compile it.  The Memory mapping options found in SigmaStudio schematic,
    "IC1 - ADSP-SC5xx Control -- Memory sections". Steps for updating memory mapping,
    1. Select Code/Data/Param tabs and click on "load section map" to get current memory mapping.
    2. Change memory sections to CodeB/DataC/ParamB and click on "Update section map"
    3. Link compile the schematic with the updated memory mapping. You may find the memory requirements for the schematic.

    Once memory requirement is available, you may look at the L1 memory availability and even you can try modifying the "app.ldf" and "adi_ss_app.ldf" files for different memory mappings. The “adi_ss_app.ldf” file the details of GMAP blocks can be seen in the generated linker map file (


  • Hi,
    Thanks for your reply.

    Actually, I have tried to map Code to code B, Sate to State B or State C, Parameter to Param B and tried all of kinds of combinations. But it still fails.

    I found something strange when I use a small proj to try all of these mapping. Just "code B" can move a lot of data to code B buffer. Please refer to below table. could you help to confirm it's right? 

    In addition, I found the Data32 consume a lot of memory when I change the block size from 64 to 256. Combine with the table above. I think that why it's not useful when I modified the mapping. 

    So do you any other suggestion? Or what else can I try?


  • The FW Buffer is used to allocate memory for I/O channels. The number of buffers for each channels allocated based on " Framework Config Tab -- FW setting -- Number of input/output buffers". By default the value is 3, So if you have 8 Channel Input and 8 Channel output then the memory allocated for FW buffers is,
    (16 (I/O Channels) * 256(Block size) * 3(number of I/O buffers set in Fw settings) * 4 (Data length)) bytes.

    If you have configured the schematic for more number of I/O channels with increased block size then the memory wont be sufficient.

    Try all data sections in State buffer mapped to "State C" and try to find the memory requirement of state memory.

    You may have to reduce number of I/O channels or block size to overcome this issue. 

    May I know what is the real use case for keeping higher block size?


  • Thanks for your reply.

    Try all data sections in State buffer mapped to "State C" and try to find the memory requirement of state memory.

    >> I have tried this solution it can't work.

    If you have configured the schematic for more number of I/O channels with increased block size then the memory wont be sufficient.

    >> As there are 640KB L1 and 1024KB L2, I think it should supports my case. Or are there any thing I misunderstand?

    May I know what is the real use case for keeping higher block size?

    >> Because we are going to integrate a 3rd part audio effect algorithm which just can work in 256 blocksize. In addition, because we have a lot of source and speakers in this project. That's why we need many I/0 channels. And I have reduced the buffer number to 2.

  • May I know your I/O channel configuration in the schematic?
    May I know what is the size of GMAP block "_Block1_L1_space" in the generated map file?
    Are you using target application in Debug or Release build configuration?

    We recommend you to implement a "Buffering (FIFO)" logic to accumulate block size number of samples and when it reaches to required length  start the algorithm process. The same can be followed at the output side as well. 

  • 1. I/O channel configuration:


    0 ~ 7: stereo media, navi, VR, notification and so on. 

    8 ~ 15: mic1 ~ 5 and so on.

    16 ~ 31: 7.1.4 media.


    0 ~ 33: amp, mic, reference and so on.

    2. GMAP block "_Block1_L1_space"

    3. Debug configuration by default as we are developing phase. But I have tried release configuration. It still can't work.


    1. What's the relationship between Instance total memory and memory allocation? I mean whether the instance mem allocate from FW buffer and SS buffer?

    2. What's the different between FW buffer and SS buffer? Where are they allocate from, Such as  _Block1_L1_space?

  • The FW Buffer is used for allocating memory to SPORT buffers and these buffers are allocated in GMAP block "_Block1_L1_space". There is no option to change this buffers allocation, since the FW buffers are expected to be in L1 for better optimization.

    The memory left over FW Buffers allocations in GMAP block "_Block1_L1_space" will be used for "SS Buffer 4" which is "State A" memory for the schematic blocks state. 

    As per your I/O channels 32 (In) and 34 (Out), the FW memory requirement for 256 block size is,
    (32 + 34 (IO)) * 256 (Block size) * 4 (Sample 32-bit word) * 3 (Triple buffering in Framework ) = 0x31800 bytes (202,752 bytes).

    The current GMAP allocation is max of 0x27d50, so the memory is insufficient for you.

    You may try below recommendations to solve the issue,
    1. Try reducing the number of I/O buffers from 3 to 2 in "IC control - Hardware Configuration - Framework Config - Fw Settings - Number of Input Buffers/Number of Output Buffers". I hope there wont be any issue if both Framework and schematic running at 48 kHz for this change.

    2. Reduce the block size and have a buffer logic(FIFO) to accumulate number of samples required for your 3rd party algorithm to start processing. Similarly you may need to have buffing logic for 3rd party algorithm to copy only block size number of sample to schematic output. This method only followed by many customers. 

  • I had already reduced the number of IO buffer from 3 to 2, but it still can't work with whole modules in schematics. When I removed some of the modules in schematics it can work well.

    About your recommended solution:

    In my opinion, third-party algorithms require more computing time and resources, and they may not be able to do it with 64 blocksize cycle, which also results in higher MIPS.

    Anyway, I will double confirm with 3rd part algo to confirm this solution can work or not.


    Some other questions:
    1. Because _Block1_L1_space(0x27d50) is from mem_block1_bw and the total size of mem_block1_bw is 0x30000. Can I move some section in  mem_block1_bw  to other mem block? Is it a good way?

    2. When I try to define global variables or functions without assigned a section, which mem block are they will be placed?

  • 1. Yes, you can try moving sections to other blocks.
    2. The global variable will get mapped to any of the block which is having section "seg_dmda" and functions will get mapped to "seg_swco" section by default. The allocation starts from "mem_block0" and if no space then allocated into other mem blocks.

  • Thanks for your reply.
    One more question:

    How can I calculate total used memory from the sigmastudio output log? And where are they allocated from? e.g: FW buffer is from _Block1_L1_space(mem_block1_bw)?


                Code Coeff  Data32 Data48 Data32B Data32C CodeB 

    Total 13356  15272 88316   546       0             0             0


    Buffer Address Size (bytes)

    FW Buffer 0 0x2C0000 105032
    FW Buffer 1 0x3082B0 0
    FW Buffer 2 0x2001A0A0 0

    SS Buffer 0 0x2001A0A0 1024
    SS Buffer 1 0x26AF18 13388
    SS Buffer 2 0x2001A4A0 1024
    SS Buffer 3 0x2001A8A0 4096
    SS Buffer 4 0x2D9A48 88380
    SS Buffer 5 0x3082B0 15848
    SS Buffer 6 0x3913DC 642
    SS Buffer 7 0x200C0000 32
    SS Buffer 8 0x391660 64
    SS Buffer 9 0x200D8000 64
    SS Buffer 10 0x2001B8A0 64