Inverting a DAI output pin buffer using the SRU?

Dear all, 

I am using SigmaStudio for SHARC 4.6 and CCES 2.10.0.

I have (with great assistance from the ezone) connected my ADSP-SC589_EZ-Board to external DACs via I2S over a BRKOUT extender board.

I am using DAI1_PB02_O to output the I2S BCLK signal, and now I need to invert it because my DAC chip need the BCLK falling edge synced with DATA and FS.

My BCLK, DATA and FS are all synced to the positive edges.

Is it possible to arrange an inverted BCLK signal using the CCES project SRU? It would save me the effort of making a new PCB with a hardware inverter chip.


Clarified my platform.
[edited by: bnilsson at 3:31 PM (GMT -4) on 22 Sep 2021]