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Where to place configuration

Category: Software
Product Number: SC589
Software Version: Cces2.9

Dear Team,

This query is with reference to the following post :

I understand the structure but i am confused about where to place my custom code within this framework .Ny custom code could be thought of as some kind of post processing that would be done every audio frame , in that case where do i place my custom code within rhis framework ? 



  • Dear Team ,

    Please respond ! 



  • Hi Hermione,

    I apologize for the delay. I need to contact our admin for this site because I get notified sometimes when there are new questions here but in this case I didn't and that has happened before as well.

    You will want to do this post processing in either processaudio_callback or processaudio_background_loop depending on what type of processing you are doing. processaudio_background_loop is used to process things such as large FFTs in the background without interrupting the audio processing callback.



  • Dear chadw 

    Thank you for the support! 

    Going further i would like to ask you a particular question about Sport Sync in the code.

    I would want to use more than one SPoRT ...

    How do I sync them to ensure they receive or transmit at the appropriate same time 

  • Hi Hermione,

    In the SAM baremetal framework, we have multiple SPORTs( SPT0 -2) connected to the same audio clock to keep them synced up. This is the foundation for SPORT synchronization. After SPORTs are configured properly, they and the associated DMAs are enabled together, one after another. Technically, some SPORTs and DMAs fire up a little later than others. But we basically think all SPORT are synced up if all the above conditions are met.



  • Dear Li 

    Can you show me where and how it s done in the code ?

    Any line of code that shows this ! 

    Would be extremely helpful

  • Hi Hermione,

    The SPORTs are connected to SHARC processor's digital audio interface (DAI) where a master audio clock can be fed into system and brought to multiple SPORTs at the same time. The code of one example is around line 359, framework/drivers/bm_sru_driver/bm_sru.c. In sru_config_sharc_sam_a2b_master, the 12.288MHz audio clock from ADAU1761 goes to DAI 0 pin 3 that directly or indirectly connects the clock pins of SPORT0 and SPORT1 and A2B transceivers. By this way, multiple audio peripherals could sync up with one audio master clock.