2010-09-22 02:59:17 Need help with MTD driver problem on BF537, svn-9821

Jay Ku (UNITED STATES)

Message: 93721

I'm trying to get the NAND flash working on my custom BF537 board. The flash is connected up the same as on the BF537 stamp + flash expansion board (except I'm using a different GPIO for the READY signal). From u-boot, I can erase/read/write to the flash reliably, and 'nand bad' shows a single bad block. The configuration code for my flash is below. I've verified that the NAND READY line is being read correctly (if I ground it, the system hangs when it gets to scanning for bad blocks and then continues when I release it). But during boot the driver prints out a whole bunch of bad eraseblocks (hundreds), seemingly at random (the list is different on every boot):

...

bfin_plat_nand_init: gpio_req = 0

bfin_plat_nand_init: gpio_val = 1

bio: create slab <bio-0> at 0

Switching to clocksource bfin_cs_cycles

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 1024 (order: 1, 8192 bytes)

TCP bind hash table entries: 1024 (order: 0, 4096 bytes)

TCP: Hash tables configured (established 1024 bind 1024)

TCP reno registered

UDP hash table entries: 256 (order: 0, 4096 bytes)

UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)

NET: Registered protocol family 1

msgmni has been set to 41

io scheduler noop registered

io scheduler cfq registered (default)

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

NAND device: Manufacturer ID: 0x20, Chip ID: 0xdc (ST Micro NAND 512MiB 3,3V 8-bit)

Scanning device for bad blocks

Bad eraseblock 1 at 0x000000020000

Bad eraseblock 3 at 0x000000060000

Bad eraseblock 5 at 0x0000000a0000

Bad eraseblock 8 at 0x000000100000

Bad eraseblock 10 at 0x000000140000

Bad eraseblock 12 at 0x000000180000

Bad eraseblock 14 at 0x0000001c0000

Bad eraseblock 16 at 0x000000200000

Bad eraseblock 18 at 0x000000240000

Bad eraseblock 20 at 0x000000280000

Bad eraseblock 22 at 0x0000002c0000

Bad eraseblock 24 at 0x000000300000

... hundreds more ...

Bad eraseblock 4085 at 0x00001fea0000

Bad eraseblock 4087 at 0x00001fee0000

Bad eraseblock 4089 at 0x00001ff20000

Bad eraseblock 4092 at 0x00001ff80000

Bad eraseblock 4094 at 0x00001ffc0000

RedBoot partition parsing not available

Creating 2 MTD partitions on "gen_nand":

0x000000000000-0x000000800000 : "linux kernel(nand)"

0x000000800000-0x000020000000 : "file system(nand)"

I'm pretty stumped... any ideas how to troubleshoot this?

Config code:

#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)

#ifdef CONFIG_MTD_PARTITIONS

const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };

static struct mtd_partition bfin_plat_nand_partitions[] = {

{

.name = "linux kernel(nand)",

.size = 0x800000, // kerneal <= 8Mbytes

.offset = 0,

}, {

.name = "file system(nand)",

.size = MTDPART_SIZ_FULL,

.offset = MTDPART_OFS_APPEND,

};

#endif

#define BFIN_NAND_PLAT_CLE 2

#define BFIN_NAND_PLAT_ALE 1

static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)

{

struct nand_chip *this = mtd->priv;

if (cmd == NAND_CMD_NONE)

return;

if (ctrl & NAND_CLE)

writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));

else

writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));

}

#define BFIN_NAND_PLAT_READY GPIO_PF14

static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)

{

return gpio_get_value(BFIN_NAND_PLAT_READY);

}

static struct platform_nand_data bfin_plat_nand_data = {

.chip = {

.nr_chips = 1,

.chip_delay = 30,

#ifdef CONFIG_MTD_PARTITIONS

.part_probe_types = part_probes,

.partitions = bfin_plat_nand_partitions,

.nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),

#endif

.ctrl = {

.cmd_ctrl = bfin_plat_nand_cmd_ctrl,

.dev_ready = bfin_plat_nand_dev_ready,

};

// NAND is on BAMS0n

#define MAX(x, y) (x > y ? x : y)

static struct resource bfin_plat_nand_resources = {

.start = 0x20000000,

.end = 0x20000000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),

.flags = IORESOURCE_MEM,

};

static struct platform_device bfin_async_nand_device = {

.name = "gen_nand",

.id = -1,

.num_resources = 1,

.resource = &bfin_plat_nand_resources,

.dev = {

.platform_data = &bfin_plat_nand_data,

};

static void bfin_plat_nand_init(void)

{

printk(KERN_INFO "bfin_plat_nand_init: gpio_req = %d\n", gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat"));

printk(KERN_INFO "bfin_plat_nand_init: gpio_val = %d\n", gpio_get_value(BFIN_NAND_PLAT_READY));

}

#else

static void bfin_plat_nand_init(void) {}

#endif

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2010-09-24 12:41:16 Re: Need help with MTD driver problem on BF537, svn-9821

Jay Ku (UNITED STATES)

Message: 93826

I just did a quick reconfiguation of the BF537 stamp-board target in 2009R1-RC6 and the MTD NAND driver works great on my board (i.e. same no bad eraseblocks reported, nandtest works fine, etc.), so it looks like the problems I've been having are related to recent changes to the trunk. Hopefully someone will get a chance to look at this soon.

In the meantime, I'm going to have to go back to an older version to move forward. The main reason I wanted to use something recent was because I'm using a CAN interface and I thought it would be good to use socketcan. Any thoughts on what version I should use to get socketcan while still having a functional NAND driver? Is it possible to substitute an earlier MTD driver into the trunk I'm using without too much trouble?

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2010-09-26 06:19:12 Re: Need help with MTD driver problem on BF537, svn-9821

steven miao (CHINA)

Message: 93856

Hi Jay,

I tested on BF537-stamp with CF/IDE/NAND extender board but cannt repeat this error. The nand iobase from your log is 0x20000000 which is different from current code 0x20212000, can you update your kernel code and try again.

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

NAND device: Manufacturer ID: 0x20, Chip ID: 0xf1 (ST Micro NAND 128MiB 3,3V 8-bit)

Scanning device for bad blocks

RedBoot partition parsing not available

Creating 2 MTD partitions on "gen_nand":

0x000000000000-0x000000400000 : "linux kernel(nand)"

0x000000400000-0x000008000000 : "file system(nand)"

bfin_mii_bus: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=11)@sclk=62MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

IP-Config: Complete:tting system clock to 1970-03-29 04:33:08 UTC (7533188)

device=eth0, addr=10.99.29.103, mask=255.255.255.0, gw=10.99.29.1,

host=bf537-stamp, domain=, nis-domain=(none),

bootserver=10.99.29.111, rootserver=10.99.29.111, rootpath=

dma_alloc_init: dma_page @ 0x02a53000 - 256 pages at 0x03f00000

Freeing unused kernel memory: 8336k freed

_____________________________________

a8888b. / Welcome to the uClinux distribution \

d888888b. / _ _ \

8P"YP"Y88 / | | |_| __ __ (TM) |

8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |

8' .88 \ | | | | _ \| | | | \ / |

8`._.' Y8. \ | |__ | | | | | |_| | / \ |

d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |

dP . Y8b. \ For embedded processors including |

d8:' " `::88b \ the Analog Devices Blackfin /

d8" 'Y88b \___________________________________/

:8P ' :888

8a. : _a88P For further information, check out:

._/"Yaa_: .| 88P| - blackfin.uclinux.org/

\ YP" `| 8P `. - docs.blaPkfHn.Ycl:nu .o0g/:

0 `0-./__F88u8Pl._l' 0 1 ._-_. | L i' n k i- stt :/Uwwp.u li-ux or1/

gs/a:f - www.analog.com/blackfin

Have a lot of fun...

BusyBox v1.16.2 (2010-09-26 11:52:32 CST) hush - the humble shell

root:/>

root:/> flash_eraseall /dev/mtd1

Erasing 128 Kibyte @ 7c00000 -- 100 % complete.

root:/> cat /proc/version

Linux version 2.6.34.7-ADI-2010R1-pre-svn9165 (steven@debiansteven) (gcc version 4.1.2 (ADI svn)) #164 Sun Sep 26 14:17:08 CST 2010

QuoteReplyEditDelete

2010-09-26 06:26:17 Re: Need help with MTD driver problem on BF537, svn-9821

steven miao (CHINA)

Message: 93857

Hi Jay,

Which CF/IDE/NAND extender board did you use? Is it an ADI released extender?

-steven

QuoteReplyEditDelete

2010-09-26 12:11:18 Re: Need help with MTD driver problem on BF537, svn-9821

Jay Ku (UNITED STATES)

Message: 93860

Steven,

This is a custom board. I needed to change the address because my flash is connected to AMS0. I don't have an ADI expander board. I've attached a picture of the connection diagram for my board.

I just tried again starting with the stamp.c configuration file and making these three changes only (see commented lines):

//#define BFIN_NAND_PLAT_READY GPIO_PF3

#define BFIN_NAND_PLAT_READY GPIO_PF14

static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)

{

return gpio_get_value(BFIN_NAND_PLAT_READY);

}

static struct platform_nand_data bfin_plat_nand_data = {

.chip = {

.nr_chips = 1,

.chip_delay = 30,

#ifdef CONFIG_MTD_PARTITIONS

.part_probe_types = part_probes,

.partitions = bfin_plat_nand_partitions,

.nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),

#endif

.ctrl = {

.cmd_ctrl = bfin_plat_nand_cmd_ctrl,

.dev_ready = bfin_plat_nand_dev_ready,

};

#define MAX(x, y) (x > y ? x : y)

static struct resource bfin_plat_nand_resources = {

//.start = 0x20212000,

//.end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),

.start = 0x20000000,

.end = 0x20000000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),

.flags = IORESOURCE_MEM,

};

I still see the same problem...

TFTP from server 192.168.1.4; our IP address is 192.168.1.50

Filename 'uImage'.

Load address: 0x1000000

Loading: #################################################################

#################################################################

#################################################

done

Bytes transferred = 5239628 (4ff34c hex)

## Booting kernel from Legacy Image at 01000000 ...

Image Name: bf537-2.6.34.7-ADI-2010R1-pre-sv

Created: 2010-09-26 16:01:17 UTC

Image Type: Blackfin Linux Kernel Image (gzip compressed)

Data Size: 5239564 Bytes = 5 MB

Load Address: 00001000

Entry Point: 0019d684

Verifying Checksum ... OK

Uncompressing Kernel Image ... OK

Starting Kernel at = 0019d684

Linux version 2.6.34.7-ADI-2010R1-pre-svn9156 (jayk@jayk-desktop) (gcc version 4.3.5 (ADI-trunk/svn-4912) ) #96 Sun Sep 26 09:01:12 PDT 2010

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 32MB

Kernel Managed Memory: 32MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x00116438

rodata = 0x00116438-0x0016efe0

bss = 0x0016f000-0x0017f4c4

data = 0x0017f4c4-0x00192000

stack = 0x00190000-0x00192000

init = 0x00192000-0x009ca000

available = 0x009ca000-0x01f00000

DMA Zone = 0x01f00000-0x02000000

Hardware Trace Active and Enabled

Boot Mode: 3

Reset caused by Software reset

Compiled for ADSP-BF537 Rev 0.2

Warning: Compiled for Rev 2, but running on Rev 3

Blackfin Linux support by blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 125 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

External memory: cacheable in instruction cache

Data Cache Enabled for CPU0

External memory: cacheable (write-back) in data cache

Built 1 zonelists in Zone order, mobility grouping off. Total pages: 7874

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=25000000 earlyprintk=serial,uart0,57600 console=ttyBF0,57600

PID hash table entries: 128 (order: -3, 512 bytes)

Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)

Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)

Memory available: 21432k/32768k RAM, (8416k init code, 1109k kernel code, 495k data, 1024k dma, 292k reserved)

Hierarchical RCU implementation.

NR_IRQS:138

Configuring Blackfin Priority Driven Interrupts

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 993.28 BogoMIPS (lpj=1986560)

Security Framework initialized

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 48 KB (35 KB free)

NET: Registered protocol family 16

Blackfin DMA Controller

stamp_init(): registering device resources

bio: create slab <bio-0> at 0

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

Switching to clocksource bfin_cs_cycles

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 1024 (order: 1, 8192 bytes)

TCP bind hash table entries: 1024 (order: 0, 4096 bytes)

TCP: Hash tables configured (established 1024 bind 1024)

TCP reno registered

UDP hash table entries: 256 (order: 0, 4096 bytes)

UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)

NET: Registered protocol family 1

msgmni has been set to 41

io scheduler noop registered

io scheduler cfq registered (default)

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

NAND device: Manufacturer ID: 0x20, Chip ID: 0xdc (ST Micro NAND 512MiB 3,3V 8-bit)

Scanning device for bad blocks

bd->options & NAND_BBT_SCANALLPAGES=0 numblocks=8192 scanlen=0 readlen=2

Bad eraseblock 1 at 0x000000020000

Bad eraseblock 7 at 0x0000000e0000

Bad eraseblock 10 at 0x000000140000

Bad eraseblock 98 at 0x000000c40000

Bad eraseblock 100 at 0x000000c80000

Bad eraseblock 103 at 0x000000ce0000

. deleted ~700 lines

Bad eraseblock 4079 at 0x00001fde0000

Bad eraseblock 4082 at 0x00001fe40000

Bad eraseblock 4084 at 0x00001fe80000

Bad eraseblock 4086 at 0x00001fec0000

Bad eraseblock 4089 at 0x00001ff20000

Bad eraseblock 4092 at 0x00001ff80000

Bad eraseblock 4095 at 0x00001ffe0000

RedBoot partition parsing not available

Creating 2 MTD partitions on "gen_nand":

0x000000000000-0x000000400000 : "linux kernel(nand)"

0x000000400000-0x000020000000 : "file system(nand)"

bfin_mii_bus: probed

bfin_mac: attached PHY driver [SMSC LAN8710/LAN8720] (mii_bus:phy_addr=0:00, irq=-1, mdc_clk=2500000Hz(mdc_div=24)@sclk=125MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 1970-01-01 08:36:35 UTC (30995)

dma_alloc_init: dma_page @ 0x01a2e000 - 256 pages at 0x01f00000

Freeing unused kernel memory: 8416k freed

_____________________________________

a8888b. / Welcome to the uClinux distribution \

d888888b. / _ _ \

8P"YP"Y88 / | | |_| __ __ (TM) |

8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |

8' .88 \ | | | | _ \| | | | \ / |

8`._.' Y8. \ | |__ | | | | | |_| | / \ |

d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |

dP . Y8b. \ For embedded processors including |

d8:' " `::88b \ the Analog Devices Blackfin /

d8" 'Y88b \___________________________________/

:8P ' :888

8a. : _a88P For further information, check out:

._/"Yaa_: .| 88P| - blackfin.uclinux.org/

\ YP" `| 8P `. - docs.blackfin.uclinux.org/

/ \.___.d| .' - www.uclinux.org/

`--..__)8888P`._.' jgs/a:f - www.analog.com/blackfin

Have a lot of fun...

BusyBox v1.16.2 (2010-09-20 21:49:40 PDT) hush - the humble shell

root:/>

As I said before, the flash works fine with 2009R1-RC6 and with the latest u-boot:

bfin> nand info

Device 0: NAND 512MiB 3,3V 8-bit, sector size 128 KiB

bfin> nand bad

Device 0 bad blocks:

06ca0000

bfin> nand erase 0 500000

NAND erase: device 0 offset 0x0, size 0x500000

Erasing at 0x4e0000 -- 100% complete.

bfin> tftp 1000000 uImage

Using bfin_mac device

TFTP from server 192.168.1.4; our IP address is 192.168.1.50

Filename 'uImage'.

Load address: 0x1000000

Loading: #################################################################

#################################################################

#################################################

done

Bytes transferred = 5239628 (4ff34c hex)

bfin> nand write.jffs2 1000000 0 500000

NAND write: device 0 offset 0x0, size 0x500000

5242880 bytes written: OK

bfin> nand read.jffs2 1000000 0 500000

NAND read: device 0 offset 0x0, size 0x500000

5242880 bytes read: OK

bfin> bootm 1000000

## Booting kernel from Legacy Image at 01000000 ...

Image Name: bf537-2.6.34.7-ADI-2010R1-pre-sv

Created: 2010-09-26 16:01:17 UTC

Image Type: Blackfin Linux Kernel Image (gzip compressed)

Data Size: 5239564 Bytes = 5 MB

Load Address: 00001000

Entry Point: 0019d684

Verifying Checksum ... OK

Uncompressing Kernel Image ... OK

Starting Kernel at = 0019d684

Linux version 2.6.34.7-ADI-2010R1-pre-svn9156 (jayk@jayk-desktop) (gcc version 4.3.5 (ADI-trunk/svn-4912) ) #96 Sun Sep 26 09:01:12 PDT 2010

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 32MB

Kernel Managed Memory: 32MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x00116438

rodata = 0x00116438-0x0016efe0

bss = 0x0016f000-0x0017f4c4

data = 0x0017f4c4-0x00192000

stack = 0x00190000-0x00192000

init = 0x00192000-0x009ca000

available = 0x009ca000-0x01f00000

DMA Zone = 0x01f00000-0x02000000

Any other ideas what could be going on? Do you know whatever happened with this thread: blackfin.uclinux.org/gf/project/uclinux-dist/forum/?_forum_action=ForumMessageBrowse&thread_id=42518&action=ForumBrowse&forum_id=39? They seemed to be having the same problem I am.

- Jay

nand.PNG

QuoteReplyEditDelete

2010-09-27 03:54:48 Re: Need help with MTD driver problem on BF537, svn-9821

steven miao (CHINA)

Message: 93881

Hi Jay,

Since you can read and write nand correctly with uboot, your board connect to AMS0 and use 0x20000000 as IO port is no problem. Compared with nand_plat driver between uboot and kernel, the difference is chip_delay. Can you set the chip_dealy to 20 in stamp.c and set gpio direction to input for BFIN_NAND_PLAT_READY pin(uboot did this, but I think it is input by default). This nand scan fail error seems like a timing issue.

static struct platform_nand_data bfin_plat_nand_data = {

.chip = {

.nr_chips = 1,

.chip_delay = 20,

#ifdef CONFIG_MTD_PARTITIONS

.part_probe_types = part_probes,

.partitions = bfin_plat_nand_partitions,

.nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),

#endif

.ctrl = {

.cmd_ctrl = bfin_plat_nand_cmd_ctrl,

.dev_ready = bfin_plat_nand_dev_ready,

};

....

static void bfin_plat_nand_init(void)

{

printk(KERN_INFO "bfin_plat_nand_init: gpio_req = %d\n", gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat"));

gpio_direction_input(BFIN_NAND_PLAT_READY);

printk(KERN_INFO "bfin_plat_nand_init: gpio_val = %d\n", gpio_get_value(BFIN_NAND_PLAT_READY));

gpio_direction_input(BFIN_NAND_PLAT_READY);

}

QuoteReplyEditDelete

2010-09-27 13:43:31 Re: Need help with MTD driver problem on BF537, svn-9821

Jay Ku (UNITED STATES)

Message: 93886

Steven,

Those changes made no difference.

I previously tried increasing chip_delay all the way up to 100, but nothing changed. Actually, looking at nand_base.c, I can't see where chip_delay is even used if dev_ready is defined.

I added some printk's to verify the IO settings before the bad-block check and they look ok:

bfin_plat_nand_init: gpio_req = 0

bfin_plat_nand_init: gpio_val = 1

bfin_plat_nand_init: EBIU_AMBCTL0 = 0x7bb07bb0

bfin_plat_nand_init: EBIU_AMBCTL1 = 0x99b27bb0

bfin_plat_nand_init: PORT_MUX = 0x80

bfin_plat_nand_init: PORTF_FER = 0xbf43

bfin_plat_nand_init: PORTFIO_DIR = 0x0

bfin_plat_nand_init: PORTFIO_INEN = 0x4000

I also checked these values in sys/kernel/debug/blackfin after boot and they're the same as above.

I previously played around with the timing on the AMS0 bank. Even increasing the values to the maximum possible cycle time (EBIU_AMBCTL0 = 0xffc0), I see the same problem.

Thinking about timing, I looked at the NAND04 datasheet ( www.numonyx.com/Documents/Datasheets/NAND04G-B2D_NAND08G-BxC.pdf) and one of the suspiciously long times in there is tWHBL (also called tWB) - time from write-enable high to ready/busy low. This is 100ns (max) for my part. Apparently the folks who wrote the MTD driver were aware of this, because there are a couple of ndelay(100)'s in there that mention tWB, but this got me thinking maybe this spec was still being violated someplace. So I added an ndelay(100) before every loop in nand_base.c that called chip->dev_ready() and now my power-on bad eraseblock check works (it agrees with what u-boot finds)... but nandtest still fails. So close.

Two other suspicious timing specs are tWHR and tRHW - the delay from write-enable high to read-enable low and vice versa. These are 60ns and 100ns for my chip. One of these in handled partially by the B0TT field in EBIU_AMBCTL0, but that only adds 4 cycles (max) between a read and a write. So I tried preceeding every readb (or readb loop) with an ndelay(60) and following it with ndelay(100). Unfortunately, nandtest still fails.

I also see tADL in the spec... time from last address latched to data load time during program ops. Looks like this only comes into play between a NAND_CMD_SEQIN command and the write-data that follows, so I inserted ndelay(70) after each chip->cmdfunc(mtd, NAND_CMD_SEQIN, ...). Still no joy (nandtest still fails). I've attached my latest version of nand_base.c to this message. Lines I added have 'JK' comments.

I can still see this being a timing problem. Any thoughts on other places to look?

- Jay

nand_base.c

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2010-09-29 01:21:49 Re: Need help with MTD driver problem on BF537, svn-9821

Jay Ku (UNITED STATES)

Message: 93941

The driver works fine if I don't set dev_ready and just let it check the flash ready in software. It doesn't find any incorrect eraseblocks and nandtest works with no errors. I'll work on getting the hardware ready/busy working when I have time - at least I can move on.

I agree it's probably a timing issue, but I can't find it. While I was looking through the nand_base.c, I found various places that the chip timing might be violated with a fast enough processor. Take a look at tADL - a 100ns min delay between loading the address and starting to load data during programming operations - I'm not sure it's being met in nand_write_oob_std() between the cmdfunc() and write_buf()). But I tried inserting small ndelay()'s in various places and couldn't get my device to pass nandtest.

- Jay

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2010-09-29 16:19:53 Re: Need help with MTD driver problem on BF537, svn-9821

Stefan Pledl (GERMANY)

Message: 93983

I can confirm your changes.

We also use a bf537-stamp based board with a NAND chip (NAND device: Manufacturer ID: 0x20, Chip ID: 0x76 (ST Micro NAND 64MiB 3,3V 8-bit). Using 2009R1.1 we had no problems. After updating to 2010R1 we get also bad eraseblocks. Thanks to your work, commenting out '.dev_ready = bfin_plat_nand_dev_ready' also solves our problem.

I agree with you that there is a timing problem when using the ready signal, because when we insert some 'printk' in the bad block scanning code, we see a lot of output, but no bad blocks have been detected.

At the moment we can work without the ready signal, but if you have an appropriate solution please let me know, i will also test this on our board.

thanks

Stefan

Attachments:

nand_base.c.zip