2008-07-22 15:59:54 bfin-nand breaks async bus peripherals.

Felix Lazarev (UNITED STATES)

Message: 59243

BF548-EZKit

After fighting over 2 weeks with ISP176x driver, by chance, i've discovered root cause of the problem.

Apparently -- mounting nand flash caused EBIU to fail on some reads/writes. It seems that there's no interlocking implemented between EBIU and NAND drivers. They share same data bus, but chip selects are different. Therefore there suppose to be a mutex implemented between two devices.

Here are the steps to recreate a failure :

1 .compile kernel as XIP from NOR flash

2. compile NAND support on

3. flash everything

4. make ext2fs on /dev/mtdblockX (what ever you defined)

5. kernel hangs and being reset by watchdog

----------

another way :

1. compile kernel to run from RAM with some EBIU based devices -- ISP13xx or ISP1761 and NAND support

2. flash everything

3. mount your mtdblock

4. perform file tranfsers between usb stick and NAND

5. you'll get corrupted FS on NAND and your EBIU devices (usb) will fail with random errors.

----------

QuoteReplyEditDelete

2008-07-22 17:24:13 Re: bfin-nand breaks async bus peripherals.

Robin Getz (UNITED STATES)

Message: 59245

Felix:

I'm sure you are correct... but that doesn't make any sense. the NAND is on a seperate pins, with seperate chip selects. It does not sit on the EBIU.

QuoteReplyEditDelete

2008-07-22 18:19:00 Re: bfin-nand breaks async bus peripherals.

Felix Lazarev (UNITED STATES)

Message: 59246

They share the data bus and there's device called APCM (asynchronous pin control module) that arbitrates the data bus between AMC, ATA and NAND controller, but i haven't seen anywhere that NAND is actually checks for the statuses...

QuoteReplyEditDelete

2008-07-22 22:06:38 Re: bfin-nand breaks async bus peripherals.

Mike Frysinger (UNITED STATES)

Message: 59253

lets make sure we're talking about the same driver ... you're referring to the on-chip nand flash controller (NFC) that's on the BF54x and not the nand controller that hooks up directly to the async memory bus ?

QuoteReplyEditDelete

2008-07-23 08:39:43 Re: bfin-nand breaks async bus peripherals.

Felix Lazarev (UNITED STATES)

Message: 59280

That's right. NFC. and bfin-nand driver. The board i've tested this on is EZKit Lite BF548. External peripheral i've used is ISP1761 connected on AMS2 and one of free GPIOs as IRQ. This problem is recreateable without the peripheral too -- if you'll use method 1.

QuoteReplyEditDelete

2008-07-23 13:35:59 Re: bfin-nand breaks async bus peripherals.

Robin Getz (UNITED STATES)

Message: 59285

Felix:

Yes - the HRM states:

The NFC shares the ADSP-BF54x processors’ pins with the AMC and ATAPI blocks. There is an Asynchronous Pin Control Module (APCM) that controls and arbitrates the asynchronous interface between the AMC, NAND, and ATA controllers. When an NFC transfer starts, the NFC requests the pins. Once the pins are granted, the NFC performs multiple transfers before releasing the pins. If the transfer is from the write buffer, NFC retains the pins until the write buffer is empty. If the transfer is a page access, the NFC performs 8 external bus cycles, then checks to see if the AMC requires the pins. If the AMC does require the pins, NFC releases them. Otherwise, the NFC continues conducting transfers until the page is complete or an AMC request occurs.

In the EBIU section:

The EBIU allows the on-chip Nand Flash controller and ATAPI controller to share its asynchronous interface pins. An asynchronous pin control module (APCM), in the EBIU, controls the accesses to the asynchronous memory interface pins, based on a set priority.

The APCM hardware is just that - hardware - there is no software interface to it - there is nothing to check, and nothing to configure. It is a 100% fixed interface. There is no interlocking implemented between EBIU and NAND drivers since there shouldn't need to be. (at least on the data interface that has to do with the APCM).

I'm sure there is a problem - but APCM isn't it.

-Robin

QuoteReplyEditDelete

2008-07-24 11:19:23 Re: bfin-nand breaks async bus peripherals.

Felix Lazarev (UNITED STATES)

Message: 59354

I've mentioned APCM to indicate that EBIU and NFC are indeed sharing data bus. My further analisys showed that sometimes after NAND access NAND chip select is still asserted while AMS is in the transitional state -- for some 10-15 ns both are asserted . i've cought this situation numerous times.

QuoteReplyEditDelete

2008-07-25 14:38:37 Re: bfin-nand breaks async bus peripherals.

Robin Getz (UNITED STATES)

Message: 59416

Felix:

I'm trying to replicate things here - but between now and then - if you have a logic analyzer (or scope) connected - (with the AMS pins and the NAND chip select and the SCLK) - can you post a screen capture?

Thanks

QuoteReplyEditDelete

2008-08-13 17:17:00 Re: bfin-nand breaks async bus peripherals.

Kevin Kreitzer (UNITED STATES)

Message: 60425

Felix/Robin:

I have tried to test this here using VDSP. Using DMA to do a write/read NAND flash test while doing core write/read to async bank 0 in the background. I haven't seen any NAND flash test failures or conflicts between AMS0 and NANDCE. I do not have plot capability on my scope, but am seeing 30 nS transition time when switching from NANDCE assertion to AMS0 assertion and 22 nS transition time from AMS0 assertion back to NANDCE assertion. I did a logic trigger to detect simultaneous NANDCE and AMS0 assertion and it never triggered during a 5 minute test (don't want to wear out the NAND flash too badly!).

Can you please advise what async bank you are using and what your async EBIU settings are? I am using bank0 and

*pEBIU_AMGCTL = 0x0008;

*pEBIU_AMBCTL0 = 0x11141114;

*pEBIU_AMBCTL1 = 0x11141114;

Thanks!

QuoteReplyEditDelete

2008-09-16 17:16:53 Re: bfin-nand breaks async bus peripherals.

Felix Lazarev (UNITED STATES)

Message: 62268

i've just came up with another way to recreate the problem ---

make ext2fs on /dev/mtdblockX

mount /dev/mtdblockX /mnt

cat /dev/urandom > /mnt/testfile

cpu crashes with kernel panic.

QuoteReplyEditDelete

2008-09-16 18:03:55 Re: bfin-nand breaks async bus peripherals.

Mike Frysinger (UNITED STATES)

Message: 62269

your rercreation is with the kernel running XIP in NOR flash (hooked up to async bank 0) and running mke2fs on a mtdblock device that is backed by the on-chip nand flash controller ?

simply saying "/dev/mtdblockX" is ambiguous: all flash devices configured with block access are defined as mdtblockX

QuoteReplyEditDelete

2008-09-25 04:52:26 Re: bfin-nand breaks async bus peripherals.

Mike Frysinger (UNITED STATES)

Message: 62695

tested the default BF548-EZKIT config with the trunk kernel

i mounted the file system partition in the NAND flash (/dev/mtd4) as yaffs:

mount -t yaffs /dev/mtdblock4 /mnt/nand

then i mounted the hard drive (which is formatted vfat atm):

mount /dev/sda1 /mnt/hd

the /dev/mtd2 device represents the file system stored in NOR flash

here i copied files simultaneously from nor flash to both NAND and the HD: