2009-03-25 15:02:22     Increase the SPI Clock Frequency

2009-03-25 15:02:22     Increase the SPI Clock Frequency

Anna Neal (UNITED STATES)

Message: 71543   

Hello,

  I am trying to increase the core clock

  frequency with the intention that this will also increase the

  SPI clock frequency. Do you know how to achieve this?

  Where is the PLL_CTL register initialized?

  I am using the BF527.

  Currently the CCLK is 525Mhz, we are trying to increase it to

  600Mhz.

  Thanks in advance,

  Anna

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2009-03-25 16:31:56     Increase the SPI Clock Frequency

Michael Hennerich (GERMANY)

Message: 71545    SPI CLK is derived from SCLK and NOT CCLK.

Max SPI CLK is SCLK/4 where max SCLK=133,33MHz

So max SPI SCLK is 33,33MHz.

Take a look here:

docs.blackfin.uclinux.org/doku.php?id=spi

You set SPI CLK by providing a proper value in

struct spi_board_info[]->max_speed_hz