2009-08-11 17:57:24     UART Read Anomaly During Raw Mode

2009-08-11 17:57:24     UART Read Anomaly During Raw Mode

David Kasper (UNITED STATES)

Message: 78679   

I am experiencing read errors associated with UART1 of the BF-537-STAMP and am using 2008R1.5-RC3.  I wrote a simple test program that configures ttyBF1 to raw mode, writes a character, reads and then compares.  Note I have connected the TX & RX data pins of UART1.  Everything works fine until the 4096 character has been processed.  At this point the number of characters read indicates that more then one was received.  Below is the code that sets up raw mode and my test program.  Any help would be appreciated.

Dave

//=============================================================================

/// Main.cpp

//=============================================================================

#include <fcntl.h>

#include <stdio.h>

#include <termios.h>

#include <unistd.h>

typedef unsigned char   uint8;

typedef unsigned int    uint32;

typedef int             int32;

//=============================================================================

///                              CONSTANT SECTION

//=============================================================================

static const int READ_FLUSH_SIZE = 5;

//=============================================================================

///                              VARIABLE SECTION

//=============================================================================

int32          m_iFid;         ///< File ID of the specified UART

struct termios m_tmbuf;        ///< New terminal settings

struct termios m_tmsave;     ///< Original terminal settings

//=============================================================================

///                              LOCAL FUNCTIONS

//=============================================================================

//=============================================================================

/// init

//=============================================================================

void init(void)

{

   // Get file ID of UART1 device

   m_iFid = open("/dev/ttyBF1", O_RDWR);

   // Get current terminal settings

   tcgetattr(m_iFid, &m_tmbuf);

   // Copy current settings so we can restore them later

   m_tmsave = m_tmbuf;

   // Local modes - turn off echoing, canocal, extended functions

   // and signal chars

   m_tmbuf.c_lflag &= ~(ECHO|ICANON|IEXTEN|ISIG);

   // Non-blocking

   m_tmbuf.c_cc[VMIN]  = 0;

   m_tmbuf.c_cc[VTIME] = 0;

   // Input modes - turn off canonical, extended functions and signal chars

   m_tmbuf.c_iflag &= ~(BRKINT|ICRNL|INPCK|ISTRIP|IXON);

   // Output modes - turn off post processing

   m_tmbuf.c_oflag &= ~(OPOST);

   // Configure 8 bits per character

   m_tmbuf.c_cflag |= (CS8);

   // Configure input/output baud rate

   cfsetispeed(&m_tmbuf, B115200);

   cfsetospeed(&m_tmbuf, B115200);

   // Apply new settings now after flushing

   tcsetattr(m_iFid, TCSAFLUSH, &m_tmbuf);

}

//=============================================================================

/// main

///

/// \param argc - unused parameter

/// \param argv - unused parameter

//=============================================================================

int main(int argc, char** argv)

{

   //Temporary variables

   int          nNumCharsRead;

   int          iIterateIndx;

   int32        iWriteStatus;

   uint8        nUart1ReadValue[READ_FLUSH_SIZE];

   uint8        nUart1WriteValue;

   //Initialization

   nUart1WriteValue = 'a';

   //Initialize UART

   init();

   //Loop over failure

   for (iIterateIndx = 0; iIterateIndx < 4500; iIterateIndx++)

   {

      //Write character

      iWriteStatus = ::write(m_iFid, (void *)&nUart1WriteValue, 1);

      //Delay before reading (20 msec minimum required)

      usleep(20000);

      //Read character

      nNumCharsRead = ::read(m_iFid, (void *)nUart1ReadValue, READ_FLUSH_SIZE);

      //Compare read & write values

      if (nUart1WriteValue != nUart1ReadValue[0])

      {

         printf( "\r\n\r\nFAIL: Indx = %d, Wrote = %X, Read = %X, Chars Read = %d",

                 iIterateIndx,

                 nUart1WriteValue,

                 nUart1ReadValue[0],

                 nNumCharsRead

               );

         break;

      }

      else

      {

         //Periodic status

         if ((iIterateIndx % 100) == 0)

         {

            printf( "\r\nPASS: Indx = %d", iIterateIndx);

         }

      }

      //Update test pattern for next pass of the loop

      nUart1WriteValue += 1;

      //Limit to range of ASCII chars

      if (nUart1WriteValue > 'z')

      {

         nUart1WriteValue = 'a';

      }

   }

   //Check if device is currently open

   if (m_iFid > 0)

   {

       close(m_iFid);

       // Restore terminal settings (no error trapping)

       tcsetattr(m_iFid, TCSANOW, &m_tmsave);

   }

   // Temporary variables

return 0;

}

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2009-08-11 18:03:45     Re: UART Read Anomaly During Raw Mode

Mike Frysinger (UNITED STATES)

Message: 78680   

you might want to try getting the 2008R1 kernel svn as there have been many fixes to the UART driver

assuming you're using DMA, you could try changing your kernel configuration to PIO mode to see if that makes a difference.  if it does, then there have been UART DMA fixes since the release.

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2009-08-11 18:53:04     Re: UART Read Anomaly During Raw Mode

David Kasper (UNITED STATES)

Message: 78681   

Mike,

Thanks for your reply.  How do I configure the driver for PIO mode?

Dave

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2009-08-11 19:48:41     Re: UART Read Anomaly During Raw Mode

David Kasper (UNITED STATES)

Message: 78682   

Mike,

I tried enabling the UART driver for PIO mode but this causes the kernel to panic (see below).  Do you have any ideas?

Dave

bf537> bootm

## Booting image at 01000000 ...

   Image Name:   Linux-2.6.22.19-ADI-2008R1.5-svn

   Created:      2009-08-11 23:19:21 UTC

   Image Type:   Blackfin Linux Kernel Image (gzip compressed)

   Data Size:    2343393 Bytes = 2.2 MB

   Load Address: 00001000

   Entry Point: 0015c000

   Verifying Checksum ... OK

   Uncompressing Kernel Image ... OK

Starting Kernel at = 15c000

Linux version 2.6.22.19-ADI-2008R1.5-svn (student@562QL21.mdsi.net) (gcc version 4.1.2 (ADI svn)) #69 Tue Aug 11 16:19:17 PDT 2009

Hardware Trace Active and Enabled

Blackfin support (C) 2004-2007 Analog Devices, Inc.

Compiled for ADSP-BF537 Rev 0.3

Warning: Compiled for Rev 3, but running on Rev 2

Blackfin Linux support by   blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 100 MHz System Clock

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

text      = 0x00001000-0x00100de0

rodata    = 0x00101000-0x0014b27c

data      = 0x0014c000-0x0015c000

    stack   = 0x0014c000-0x0014e000

init      = 0x0015c000-0x00456000

bss       = 0x00456000-0x00466650

available = 0x00466650-0x03eff000

DMA Zone = 0x03f00000-0x04000000

NOMPU: setting up cplb tables for global access

Instruction Cache Enabled

Data Cache Enabled (write-through)

Built 1 zonelists. Total pages: 16002

Kernel command line: root=/dev/mtdblock3 rw console=ttyBF0,115200

Configuring Blackfin Priority Driven Interrupts

PID hash table entries: 256 (order: 8, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 59424k/65536k RAM, (3048k init code, 1023k kernel code, 430k data, 1024k dma, 584k reserved)

Blackfin Scratchpad data SRAM: 4 KB

Blackfin Data A SRAM: 16 KB (15 KB free)

Blackfin Data B SRAM: 16 KB (16 KB free)

Blackfin Instruction SRAM: 48 KB (40 KB free)

Mount-cache hash table entries: 512

NET: Registered protocol family 16

Blackfin GPIO Controller

Blackfin DMA Controller

kcb_init(): registering device resources

Generic PHY: Registered new driver

NET: Registered protocol family 2}

                                  IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

JFFS2 version 2.2. (NAND) ÂCopyright 2001-2006 Red Hat, Inc.

io scheduler noop registered

io scheduler anticipatory registered (default)

io scheduler cfq registered

ISA-BlackFin-CAN CAN Driver 3.4.6_AD_BLACKFIN (c) Aug 11 2009

BlackFin port by H.J. Oertel (oe@port.de)

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

Serial: Blackfin serial driver

bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

bfin-uart.1: ttyBF1 at MMIO 0xffc02000 (irq = 20) is a BFIN-UART

RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize

SMSC LAN83C185: Registered new driver

bfin_mac_mdio: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=19)@sclk=100MHz)

bfin_mac: Version 1.1, Blackfin BF53[67] BF527 on-chip Ethernet MAC driver

bfin-spi bfin-spi.0: Blackfin BF5xx on-chip SPI Contoller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

TCP cubic registered

NET: Registered protocol family 1

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting the system clock to 1970-01-01 03:49:45 (13785)

Freeing unused kernel memory: 3048k freed

                    System MMR Error

- An error occurred due to an invalid access to an System MMR location

   Possible reason: a 32-bit register is accessed with a 16-bit instruction

   or a 16-bit register is accessed with a 32-bit instruction.

Kernel OOPS in progress

HW Error context

CURRENT PROCESS:

COMM=mkdir PID=34

TEXT = 0x00000000-0x00000000        DATA = 0x00000000-0x00000000

BSS = 0x00000000-0x00000000 USER-STACK = 0x00000000

return address: [0x0003214a]; contents of:

0x00032120: e100 d6a4 63a7 914a e412 0029 e3fe d660

0x00032130: e3ff d386 2f08 6023 2f6d 3215 acd1 ac8a

0x00032140: e512 0024 0c42 1749 2f52 [6028] e431 0017

0x00032150: 5401 0c08 1807 602a 0810 1404 4833 1402

SEQUENCER STATUS:               Not tainted

SEQSTAT: 0000803f IPEND: 8030 SYSCFG: 0006

HWERRCAUSE: 0x2

EXCAUSE   : 0x3f

physical IVG15 asserted : <0xffa00df4> { _evt_system_call + 0x0 }

logical irq   6 mapped : <0xffa00250> { _timer_interrupt + 0x0 }

logical irq 18 mapped : <0x0009d694> { _bfin_serial_rx_int + 0x0 }

logical irq 19 mapped : <0x0009d828> { _bfin_serial_tx_int + 0x0 }

logical irq 24 mapped : <0x000a573c> { _bf537mac_interrupt + 0x0 }

RETE: <0x00000000> /* Maybe null pointer? */

RETN: <0x007f8000> /* unknown address */

RETX: <0x0074c5c2> [ /lib/libuClibc-0.9.29.so + 0xc5c2 ]

RETS: <0x0005ad08> { _elf_fdpic_map_file + 0x454 }

PC : <0x0003214a> { _do_mmap_pgoff + 0x23e }

PROCESSOR STATE:

R0 : 00000000    R1 : 00000005    R2 : 00000000    R3 : 0000007f

R4 : 00000000    R5 : 03da0660    R6 : 00001802    R7 : 00000000

P0 : 00106bb0    P1 : 03da0660    P2 : 03ef37a0    P3 : 00057e4f

P4 : 00057000    P5 : 00056e50    FP : 007f7cf4    SP : 007f7bec

LB0: ffa01b24    LT0: ffa01b24    LC0: 00000000

LB1: 0005a8e2    LT1: 0005a8d8    LC1: 00000000

B0 : 00000000    L0 : 00000000    M0 : 00000000    I0 : 00000001

B1 : 00000000    L1 : 00000000    M1 : 00000000    I1 : 00000000

B2 : 00000000    L2 : 00000000    M2 : 00000000    I2 : fffedbe8

B3 : 00000000    L3 : 00000000    M3 : 00000000    I3 : 00000000

A0.w: 00000000   A0.x: 00000000   A1.w: 00000000   A1.x: 00000000

USP : 007bfa28 ASTAT: 02003025

Hardware Trace:

   0 Target : <0x00004708> { _trap_c + 0x0 }

     Source : <0xffa00d22> { _evt_ivhw + 0x7e }

   1 Target : <0xffa00ca4> { _evt_ivhw + 0x0 }

     Source : <0xffa00ca2> { __common_int_entry + 0xca }

   2 Target : <0xffa00c40> { __common_int_entry + 0x68 }

     Source : <0xffa00a8e> { _return_from_int + 0x4e }

   3 Target : <0xffa00a8e> { _return_from_int + 0x4e }

     Source : <0xffa00a6e> { _return_from_int + 0x2e }

   4 Target : <0xffa00a40> { _return_from_int + 0x0 }

     Source : <0xffa00c3c> { __common_int_entry + 0x64 }

   5 Target : <0xffa00c3a> { __common_int_entry + 0x62 }

     Source : <0xffa003ec> { _asm_do_IRQ + 0x68 }

   6 Target : <0xffa003e4> { _asm_do_IRQ + 0x60 }

     Source : <0x00011290> { _irq_exit + 0x2c }

   7 Target : <0x00011264> { _irq_exit + 0x0 }

     Source : <0xffa003e0> { _asm_do_IRQ + 0x5c }

   8 Target : <0xffa003e0> { _asm_do_IRQ + 0x5c }

     Source : <0xffa00aa2> { _evt14_softirq + 0x6 }

   9 Target : <0xffa00a9c> { _evt14_softirq + 0x0 }

     Source : <0xffa00a98> { _lower_to_irq14 + 0x8 }

10 Target : <0xffa00a90> { _lower_to_irq14 + 0x0 }

     Source : <0xffa003dc> { _asm_do_IRQ + 0x58 }

11 Target : <0xffa003b6> { _asm_do_IRQ + 0x32 }

     Source : <0x00027c24> { _handle_simple_irq + 0x68 }

12 Target : <0x00027c18> { _handle_simple_irq + 0x5c }

     Source : <0x00027c2e> { _handle_simple_irq + 0x72 }

13 Target : <0x00027c2e> { _handle_simple_irq + 0x72 }

     Source : <0x0002759c> { _note_interrupt + 0x104 }

14 Target : <0x00027584> { _note_interrupt + 0xec }

     Source : <0x000274b8> { _note_interrupt + 0x20 }

15 Target : <0x00027498> { _note_interrupt + 0x0 }

     Source : <0x00027c2a> { _handle_simple_irq + 0x6e }

Stack from 007f7bcc:

        ffa00c3a ffa00d26 00056e50 00000000 00001802 00000000 00000000 00000000

        0074c5c2 00008030 0000803f 00000000 007f8000 0074c5c2 0003214a 0005ad08

        00000000 02003025 0005a8e2 ffa01b24 0005a8d8 ffa01b24 00000000 00000000

        00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

        00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

        00000000 fffedbe8 00000000 00000001 007bfa28 007f7cf4 00056e50 00057000

Call Trace:

[<00057e4f>] _inotify_add_watch+0xef/0xf4

[<00001802>] ___ioremap+0x6/0xc

[<0003e338>] ___path_lookup_intent_open+0x34/0x7c

[<000336b6>] ___kmalloc+0x72/0x88

[<0000ffff>] _do_getitimer+0x7/0x148

[<00030cbc>] ___kzalloc+0xc/0x24

[<0005ad08>] _elf_fdpic_map_file+0x454/0x718

[<000363ec>] _vfs_read+0xb0/0xd8

[<00001802>] ___ioremap+0x6/0xc

[<00001802>] ___ioremap+0x6/0xc

[<0005b36a>] _load_elf_fdpic_binary+0x39e/0x9f4

[<00020000>] _timekeeping_resume+0x98/0xac

[<0001ffb4>] _timekeeping_resume+0x4c/0xac

[<00038bac>] _copy_strings+0x38/0x190

[<00010101>] _do_getitimer+0x109/0x148

[<00001180>] _try_name+0xa8/0x168

[<00007228>] _dma_insb+0x10/0x94

[<000e000f>] _tcp_write_timer+0x413/0x5a8

[<00020000>] _timekeeping_resume+0x98/0xac

[<00010101>] _do_getitimer+0x109/0x148

[<000084a0>] _bfin_demux_error_irq+0xc0/0x1a8

[<0005bbd8>] _elf_fdpic_core_dump+0x218/0x864

[<00020000>] _timekeeping_resume+0x98/0xac

[<00038d94>] _search_binary_handler+0x6c/0x1b0

[<0003a0a8>] _do_execve+0xe8/0x1bc

[<00001716>] _sys_execve+0x2e/0x54

[<000016e8>] _sys_execve+0x0/0x54

[<00008000>] _cache_invalidate+0x28/0x34

Modules linked in:

Kernel panic - not syncing: Kernel exception

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2009-08-11 19:57:23     Re: UART Read Anomaly During Raw Mode

Mike Frysinger (UNITED STATES)

Message: 78683   

i would just get the branch

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2009-08-11 20:23:31     Re: UART Read Anomaly During Raw Mode

David Kasper (UNITED STATES)

Message: 78684   

Mike,

I am checking-out the 2008R1 branch.  Do I also need to update my toolchain?  I am using the 08r1-5 toolchain.

Dave

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2009-08-11 20:45:22     Re: UART Read Anomaly During Raw Mode

Mike Frysinger (UNITED STATES)

Message: 78685   

no need ... all the branches are kept compatible with the respective releases

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2009-08-12 13:33:47     Re: UART Read Anomaly During Raw Mode

David Kasper (UNITED STATES)

Message: 78776   

Mike,

Thanks, revision 7155 of the 2008R1 branch worked.  In order to avoid a lot of regression testing I am considering patching my older version of the kernel.  How do I determine the associated source files?  Do you think it would only be the /uclinux-dist/linux-2.6.1/drivers/serial/bfin_5xx.c file?

Thanks,

David Kasper

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2009-08-12 13:57:54     Re: UART Read Anomaly During Raw Mode

Mike Frysinger (UNITED STATES)

Message: 78778   

off the top of my head, that should be the only file.  but doing what you're doing isnt supported, so it may work and it may not ...