[#4150] /proc/sram does not show L1 information correctly on BF531

Submitted By: Yi Li

Open Date

2008-06-05 06:44:21 Close Date

2008-07-02 23:13:28

Priority:

Medium High Assignee:

Michael Hennerich

Status:

Closed Fixed In Release:

N/A

Found In Release:

2008R1-RC8 Release:

2008R1

Category:

N/A Board:

Custom

Processor:

BF531 Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

App binary format:

N/A

Summary: /proc/sram does not show L1 information correctly on BF531

Details:

On a customer board using BF531, "cat /proc/sram" only shows L1 data sram usage, there is no L1 instruction information.

Follow-ups

--- Michael Hennerich 2008-06-19 09:28:21

Can you explain a little bit more what you were seeing?

For me this looks expected.

-Michael

BF531 default: I and D-Cache Enabled

--- L1 Scratchpad Size PID State

ffb00000-ffb00008 8 0 ALLOCATED

ffb00008-ffb01000 4088 0 FREE

00000000-00000000 0 0 NULL

--- L1 Instruction Size PID State

ffa09af0-ffa0c000 9488 0 FREE

00000000-00000000 0 0 NULL

BF531 default: I and D-Cache Disabled

--- L1 Scratchpad Size PID State

ffb00000-ffb00008 8 0 ALLOCATED

ffb00008-ffb01000 4088 0 FREE

00000000-00000000 0 0 NULL

--- L1 Data A Size PID State

ff804000-ff808000 16384 0 FREE

00000000-00000000 0 0 NULL

--- L1 Instruction Size PID State

ffa09b18-ffa0c000 9448 0 FREE

00000000-00000000 0 0 NULL

root:/>

--- Michael Hennerich 2008-06-23 04:04:15

Please tell me what's wrong with /proc/sram on BF531 otherwise please close.

Not reproducible

-Michael

--- Yi Li 2008-06-23 05:06:55

I will try to contact the customer for detail message.

--- wisdom yan 2008-06-27 02:50:04

root:/> cat /proc/sram

proc_file_read: Apparent buffer overflow!

--- L1 ScrLL

00000000-00000000 e

ffb00000-ffb00008 8 0 ALLOCATED

ffb00008-ffb01000 4088 0 FREE

00000000-00000000 0 0 NULL

00000000-00000000 proc_file_read: Apparent buffer overflow!

root:/> cat /proc/sram

proc_file_read: Apparent buffer overflow!

Data access misaligned address violation

- Attempted misaligned data memory or data cache access.

Defered Exception context

CURRENT PROCESS:

COMM=cat PID=331

TEXT = 0x00600000-0x00650d80 DATA = 0x008c0d80-0x008caa38

BSS = 0x008caa38-0x033e0000 USER-STACK = 0x033ffeb0

return address: [0x031de02a]; contents of:

0x031de000: c000 a1e1 0000 3077 b0f0 67e6 ce82 c004

0x031de010: b136 0000 6002 e3ff ee65 0c00 3038 182b

0x031de020: 321d b9fa a056 e51a 003e [9110] 0c00 181c

0x031de030: e51c 0007 e419 007d 3014 9120 e3ff da20

SEQUENCER STATUS: Not tainted

SEQSTAT: 00000024 IPEND: 0030 SYSCFG: 0006

HWERRCAUSE: 0x0

EXCAUSE : 0x24

RETE: <0x00000000> /* Maybe null pointer? */

RETN: <0x0339a000> /* unknown address */

RETX: <0x031de02a> [ /lib/ld-uClibc-0.9.29.so + 0x602a ]

RETS: <0x031de01a> [ /lib/ld-uClibc-0.9.29.so + 0x601a ]

PC : <0x031de02a> [ /lib/ld-uClibc-0.9.29.so + 0x602a ]

DCPLB_FAULT_ADDR: <0x4c4c554c> /* unknown address */

ICPLB_FAULT_ADDR: <0x031de02a> [ /lib/ld-uClibc-0.9.29.so + 0x602a ]

PROCESSOR STATE:

R0 : 0024e8ec R1 : 00037e9c R2 : 0000e8ec R3 : 00000002

R4 : 006054cc R5 : 0089af78 R6 : 03391bd8 R7 : 0024e8ec

P0 : 00000000 P1 : 0059d264 P2 : 4c4c554e P3 : 0089af78

P4 : 0059d028 P5 : 008c2b48 FP : 033feccc SP : 03399f24

LB0: 031de181 LT0: 031de174 LC0: 00000000

LB1: 031dcec7 LT1: 031dcec6 LC1: 00000000

B0 : 00000000 L0 : 00000000 M0 : 00000000 I0 : 033ffc89

B1 : 00000000 L1 : 00000000 M1 : 00000000 I1 : 03391bd8

B2 : 00000000 L2 : 00000000 M2 : 00000000 I2 : 00000000

B3 : 00000000 L3 : 00000000 M3 : 00000000 I3 : 00000000

A0.w: 00000000 A0.x: 00000000 A1.w: 00000000 A1.x: 00000000

USP : 033fecac ASTAT: 02003004

Hardware Trace:

0 Target : <0x00005a38> { _trap_c + 0x0 }

Source : <0xffa08634> { _exception_to_level5 + 0xb4 }

1 Target : <0xffa08580> { _exception_to_level5 + 0x0 }

Source : <0xffa084dc> { _ex_trap_c + 0x5c }

2 Target : <0xffa08480> { _ex_trap_c + 0x0 }

Source : <0xffa086d4> { _trap + 0x28 }

3 Target : <0xffa086ac> { _trap + 0x0 }

Source : <0x031de026> [ /lib/ld-uClibc-0.9.29.so + 0x6026 ]

4 Target : <0x031de01a> [ /lib/ld-uClibc-0.9.29.so + 0x601a ]

Source : <0x031dbe1e> [ /lib/ld-uClibc-0.9.29.so + 0x3e1e ]

5 Target : <0x031dbe10> [ /lib/ld-uClibc-0.9.29.so + 0x3e10 ]

Source : <0x031dc110> [ /lib/ld-uClibc-0.9.29.so + 0x4110 ]

6 Target : <0x031dc10e> [ /lib/ld-uClibc-0.9.29.so + 0x410e ]

Source : <0x031dbddc> [ /lib/ld-uClibc-0.9.29.so + 0x3ddc ]

7 Target : <0x031dbd9a> [ /lib/ld-uClibc-0.9.29.so + 0x3d9a ]

Source : <0x031d93e2> [ /lib/ld-uClibc-0.9.29.so + 0x13e2 ]

8 Target : <0x031d93dc> [ /lib/ld-uClibc-0.9.29.so + 0x13dc ]

Source : <0x031d941c> [ /lib/ld-uClibc-0.9.29.so + 0x141c ]

9 Target : <0x031d941a> [ /lib/ld-uClibc-0.9.29.so + 0x141a ]

Source : <0x031d942c> [ /lib/ld-uClibc-0.9.29.so + 0x142c ]

10 Target : <0x031d9428> [ /lib/ld-uClibc-0.9.29.so + 0x1428 ]

Source : <0x031d9410> [ /lib/ld-uClibc-0.9.29.so + 0x1410 ]

11 Target : <0x031d9406> [ /lib/ld-uClibc-0.9.29.so + 0x1406 ]