[#4713] dmacopy tries to test L2 on BF537

Question

Accepted Answer

[#4713] dmacopy tries to test L2 on BF537

Submitted By: Vivi Li

Open Date

2008-12-11 02:30:47 Close Date

2008-12-23 01:32:23

Priority:

Medium Assignee:

Mike Frysinger

Status:

Closed Fixed In Release:

N/A

Found In Release:

N/A Release:

Category:

Kernel Functions Board:

N/A

Processor:

N/A Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

toolchain 4.1-2008_Dec_03

App binary format:

N/A

Summary: dmacopy tries to test L2 on BF537

Details:

sram_alloc failed in dmacopy test in most boards.

BF548-EZKIT is OK.

Bellow is the log from BF537-STAMP:

--

U-Boot 1.1.6-svn1258 (ADI-2008R1.5) (Jul 9 2008 - 11:40:04)

CPU: ADSP bf537-0.2 (Detected Rev: 0.2)

Support: blackfin.uclinux.org/

Clock: VCO: 500 MHz, Core: 500 MHz, System: 100 MHz

RAM: 64 MB

Fl

RAM size is 64 MB.

ash: 4 MB

In: serial

Out: serial

Err: serial

Net: Blackfin EMAC

MAC: 00:E0:22:FE:47:D4

Hit any key to stop autoboot: 0

bfin> set bootargs root=/dev/mtdblock0 rw earlyprintk=serial,uart0,57600

bfin> set serverip 10.100.4.174

bfin> set ipaddr 10.100.4.50

bfin> save

Saving Environment to Flash...

. done

Un-Protected 1 sectors

Erasing Flash...

. done

Erased 1 sectors

Writing to Flash... done

. done

Protected 1 sectors

bfin> tftpboot 0x2000000 linux

Using Blackfin EMAC device

TFTP from server 10.100.4.174; our IP address is 10.100.4.50

Filename 'linux'.

Load address: 0x2000000

Loading: #################################################################

#################################################################

##############

done

Bytes transferred = 5395139 (5252c3 hex)

Image size is 5252c3

bfin> run addip

bfin> bootelf

Loading .text @ 0x00001000 (1090864 bytes)

Loading .rodata @ 0x0010b530 (265152 bytes)

Loading .init.rodata @ 0x0014c0f0 (80 bytes)

Loading __ksymtab @ 0x0014c140 (15720 bytes)

Loading __ksymtab_gpl @ 0x0014fea8 (5064 bytes)

Loading __ksymtab_strings @ 0x00151270 (46428 bytes)

Loading __init_rodata @ 0x0015c7cc (172 bytes)

Loading __param @ 0x0015c878 (380 bytes)

Clearing .bss @ 0x0015ca00 (64888 bytes)

Loading .data @ 0x0016c778 (63624 bytes)

Loading .init.text @ 0x0017c000 (101872 bytes)

Loading .init.data @ 0x00194df0 (13672 bytes)

Loading .init.setup @ 0x00198358 (632 bytes)

Loading .initcall.init @ 0x001985d0 (564 bytes)

Loading .con_initcall.init @ 0x00198804 (4 bytes)

Loading .init.ramfs @ 0x00198808 (3176172 bytes)

Loading .text_l1 @ 0xffa00000 (6940 bytes)

sh_addr: FFA00000, p_paddr: 0049FEF4

Loading from: 02491000 to 0049FEF4, size: 6940

Loading .data_l1 @ 0xff800000 (192 bytes)

sh_addr: FF800000, p_paddr: 004A1A10

Loading from: 02493000 to 004A1A10, size: 192

## Starting application at 0x0018a3b0 ...

Linux version 2.6.28-rc2-ADI-2009R1-pre-svn5850 (test@uclinux57-usb176x) (gcc version 4.1.2 (ADI svn)) #13 Thu Dec 11 01:24:44 GMT 2008

console [early_BFuart0] enabled

early printk enabled on early_BFuart0

Warning: limiting memory to 56MB due to hardware anomaly 05000263

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x0010b530

rodata = 0x0010b530-0x0015c9f4

bss = 0x0015ca00-0x0016c778

data = 0x0016c778-0x0017c000

stack = 0x0017a000-0x0017c000

init = 0x0017c000-0x004a2000

available = 0x004a2000-0x037ff000

DMA Zone = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Reset caused by Software reset

Compiled for ADSP-BF537 Rev 0.2

Blackfin Linux support by blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 100 MHz System Clock

NOMPU: setting up cplb tables for global access

Instruction Cache Enabled for CPU0

Data Cache Enabled for CPU0 (write-through)

Built 1 zonelists in Zone order, mobility grouping off. Total pages: 14223

Kernel command line: root=/dev/mtdblock0 rw earlyprintk=serial,uart0,57600 ip=10.100.4.50:10.100.4.174:10.100.4.174:255.255.255.0:1:eth0:off

Configuring Blackfin Priority Driven Interrupts

PID hash table entries: 256 (order: 8, 1024 bytes)

bfin-rtc: invalid date; resetting

console handover: boot [early_BFuart0] -> real [ttyBF0]

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 52016k/65536k RAM, (3224k init code, 1065k kernel code, 451k data, 1024k dma, 7756k reserved)

Calibrating delay loop... 997.37 BogoMIPS (lpj=1994752)

Security Framework initialized

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (15 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 48 KB (41 KB free)

PDA for CPU0 reserved at 0015daf0

net_namespace: 288 bytes

NET: Registered protocol family 16

Blackfin GPIO Controller

Blackfin DMA Controller

stamp_init(): registering device resources

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

NET: Registered protocol family 1

msgmni has been set to 101

io scheduler noop registered

io scheduler anticipatory registered (default)

io scheduler cfq registered

Serial: Blackfin serial driver

bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

bfin_mac_mdio: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=19)@sclk=100MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 1970-01-01 00:00:02 UTC (2)

IP-Config: Complete:

device=eth0, addr=10.100.4.50, mask=255.255.255.0, gw=10.100.4.174,

host=1, domain=, nis-domain=(none),

bootserver=10.100.4.174, rootserver=10.100.4.174, rootpath=

Freeing unused kernel memory: 3224k freed

dma_alloc_init: dma_page @ 0x0049e000 - 256 pages at 0x03f00000

_____________________________________

a8888b. / Welcome to the uClinux distribution \

d888888b. / _ _ \

8P"YP"Y88 / | | |_| __ __ (TM) |

8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |

8' .88 \ | | | | _ \| | | | \ / |

8`._.' Y8. \ | |__ | | | | | |_| | / \ |

d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |

dP . Y8b. \ For embedded processors including |

d8:' " `::88b \ the Analog Devices Blackfin /

d8" 'Y88b \___________________________________/

:8P ' :888

8a. : _a88P For further information, check out:

._/"Yaa_: .| 88P| - blackfin.uclinux.org/

\ YP" `| 8P `. - docs.blackfin.uclinux.org/

/ \.___.d| .' - www.uclinux.org/

`--..__)8888P`._.' jgs/a:f - www.analog.com/blackfin

Have a lot of fun...

BusyBox v1.13.1 (2008-12-10 19:56:49 GMT) built-in shell (msh)

Enter 'help' for a list of built-in commands.

root:/> PHY: 0:01 - Link is Up - 100/Full

root:/>

root:/> ./dmacopy

TEST: --- SRAM (L1 INST) <-> SDRAM w/4 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, src) test case 1, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, src) test case 2, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, src) test case 3, memcmp result is 0

TEST: --- SRAM (L1 INST) <-> SDRAM w/16 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, src) test case 4, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, src) test case 5, memcmp result is 0

***: dma_memcpy SDRAMx8[s] to SRAMx8[c]

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, src) test case 6, memcmp result is 0

TEST: --- SRAM (L1 INST) <-> SDRAM w/4096 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, src) test case 7, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, src) test case 8, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, src) test case 9, memcmp result is 0

TEST: --- SRAM (L1 DATA) <-> SDRAM w/4 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]

PASS: dma_memcpy(chk, src) test case 10, memcmp result is 0

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 10, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 10, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]

PASS: dma_memcpy(chk, src) test case 11, memcmp result is 0

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 11, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 11, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]

PASS: dma_memcpy(chk, src) test case 12, memcmp result is 0

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 12, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 12, memcmp result is 0

TEST: --- SRAM (L1 DATA) <-> SDRAM w/16 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]

PASS: dma_memcpy(chk, src) test case 13, memcmp result is 0

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 13, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 13, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]

PASS: dma_memcpy(chk, src) test case 14, memcmp result is 0

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 14, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 14, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]

PASS: dma_memcpy(chk, src) test case 15, memcmp result is 0

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 15, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 15, memcmp result is 0

TEST: --- SRAM (L1 DATA) <-> SDRAM w/4096 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]

PASS: dma_memcpy(chk, src) test case 16, memcmp result is 0

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 16, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 16, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]

PASS: dma_memcpy(chk, src) test case 17, memcmp result is 0

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 17, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 17, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]

PASS: dma_memcpy(chk, src) test case 18, memcmp result is 0

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 18, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 18, memcmp result is 0

TEST: --- SRAM (L2) <-> SDRAM w/4 bytes ---

FAIL: sram_alloc(4) failed

TEST: --- SRAM (L2) <-> SDRAM w/16 bytes ---

FAIL: sram_alloc(16) failed

TEST: --- SRAM (L2) <-> SDRAM w/4096 bytes ---

FAIL: sram_alloc(4096) failed

TEST: --- SRAM (L2) <-> SDRAM w/65536 bytes ---

FAIL: sram_alloc(65536) failed

TEST: --- SRAM (L2) <-> SDRAM w/74560 bytes ---

FAIL: sram_alloc(74560) failed

TEST: --- SDRAM <-> SDRAM w/4 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 19, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 19, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 19, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 20, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 20, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 20, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 21, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 21, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 21, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/16 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 22, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 22, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 22, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 23, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 23, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 23, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 24, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 24, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 24, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/4096 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 25, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 25, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 25, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 26, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 26, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 26, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 27, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 27, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 27, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/65536 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 28, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 28, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 28, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 29, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 29, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 29, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 30, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 30, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 30, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/74560 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 31, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 31, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 31, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 32, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 32, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 32, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 33, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 33, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 33, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/140096 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 34, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 34, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 34, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 35, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 35, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 35, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 36, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 36, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 36, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/205632 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 37, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 37, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 37, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 38, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 38, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 38, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 39, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 39, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 39, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/271168 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 40, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 40, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 40, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 41, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 41, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 41, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 42, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 42, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 42, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/344864 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 43, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 43, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 43, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 44, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 44, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 44, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 45, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 45, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 45, memcmp result is 0

TEST: --- SDRAM <-> SDRAM w/3290192 bytes ---

PASS: dma_memcpy SDRAMx32[s] to SDRAMx32[c]

PASS: dma_memcpy(chk, src) test case 46, memcmp result is 0

PASS: dma_memcpy SDRAMx32[c] to SDRAMx32[d]

PASS: dma_memcpy(dst, chk) test case 46, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 46, memcmp result is 0

PASS: dma_memcpy SDRAMx16[s] to SDRAMx16[c]

PASS: dma_memcpy(chk, src) test case 47, memcmp result is 0

PASS: dma_memcpy SDRAMx16[c] to SDRAMx16[d]

PASS: dma_memcpy(dst, chk) test case 47, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 47, memcmp result is 0

PASS: dma_memcpy SDRAMx8[s] to SDRAMx8[c]

PASS: dma_memcpy(chk, src) test case 48, memcmp result is 0

PASS: dma_memcpy SDRAMx8[c] to SDRAMx8[d]

PASS: dma_memcpy(dst, chk) test case 48, memcmp result is 0

PASS: dma_memcpy(dst, src) test case 48, memcmp result is 0

SUMMARY: 5 tests failed

root:/>

--

Follow-ups

--- Mike Frysinger 2008-12-11 02:51:09

should be fixed now

--- Vivi Li 2008-12-15 03:08:31

Still fails at sram_alloc.

--- Mike Frysinger 2008-12-17 14:50:48

should be fixed now

--- Vivi Li 2008-12-23 01:32:23

This bug is OK now.

Close it. Thanks!

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[#4713] dmacopy tries to test L2 on BF537