[#4997] ppitest fails for bfin_ppi driver on bf537
Submitted By: Vivi Li
Open Date
2009-03-18 00:12:31 Close Date
2009-07-13 00:47:56
Priority:
Medium High Assignee:
Michael Hennerich
Status:
Closed Fixed In Release:
N/A
Found In Release:
N/A Release:
Category:
Tests Board:
Processor:
BF537 Silicon Revision:
Is this bug repeatable?:
Yes Resolution:
Fixed
Uboot version or rev.:
Toolchain version or rev.:
gcc4.1_2009-01-19
App binary format:
Summary: ppitest fails for bfin_ppi driver on bf537
Details:
ppitest fails on bf537 for bfin_ppi driver. Nothing is received from slave side. Config file is attached.
Bellow is the log for master:
--
Linux version 2.6.28.7-ADI-2009R1-pre-svn6180 (test@uboot34-bf537stamp) (gcc version 4.1.2 (ADI svn)) #47 Wed Mar 18 12:22:58 CS9
console [early_BFuart0] enabled
early printk enabled on early_BFuart0
Warning: limiting memory to 56MB due to hardware anomaly 05000263
Board Memory: 64MB
Kernel Managed Memory: 64MB
Memory map:
fixedcode = 0x00000400-0x00000490
text = 0x00001000-0x001039d0
rodata = 0x001039d0-0x00152dc4
bss = 0x00152dd0-0x00161794
data = 0x00161794-0x00172000
stack = 0x00170000-0x00172000
init = 0x00172000-0x0045b000
available = 0x0045b000-0x037ff000
DMA Zone = 0x03f00000-0x04000000
Hardware Trace Active and Enabled
Boot Mode: 0
Reset caused by Software reset
Blackfin support (C) 2004-2009 Analog Devices, Inc.
Compiled for ADSP-BF537 Rev 0.2
Blackfin Linux support by blackfin.uclinux.org/
Processor Speed: 500 MHz core clock and 100 MHz System Clock
NOMPU: setting up cplb tables
Instruction Cache Enabled for CPU0
Data Cache Enabled for CPU0 (write-back)
Built 1 zonelists in Zone order, mobility grouping off. Total pages: 14223
Kernel command line: root=/dev/mtdblock0 rw clkin_hz=25000000 earlyprintk=serial,uart0,57600 console=ttyBF0,57600 ip=10.100.4.50f
Configuring Blackfin Priority Driven Interrupts
PID hash table entries: 256 (order: 8, 1024 bytes)
console handover: boot [early_BFuart0] -> real [ttyBF0]
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory available: 52300k/65536k RAM, (2980k init code, 1034k kernel code, 442k data, 1024k dma, 7756k reserved)
Calibrating delay loop... 997.37 BogoMIPS (lpj=1994752)
Security Framework initialized
Mount-cache hash table entries: 512
Blackfin Scratchpad data SRAM: 4 KB
Blackfin L1 Data A SRAM: 16 KB (15 KB free)
Blackfin L1 Data B SRAM: 16 KB (16 KB free)
Blackfin L1 Instruction SRAM: 48 KB (41 KB free)
PDA for CPU0 reserved at 00153e00
net_namespace: 288 bytes
NET: Registered protocol family 16
Blackfin GPIO Controller
Blackfin DMA Controller
stamp_init(): registering device resources
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
NET: Registered protocol family 1
msgmni has been set to 102
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler cfq registered
Serial: Blackfin serial driver
bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART
brd: module loaded
bfin_mii_bus: probed
bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=19)@sclk=100MHz)
bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1
bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7
rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0
bfin-wdt: initialized: timeout=20 sec (nowayout=0)
TCP cubic registered
NET: Registered protocol family 17
rtc-bfin rtc-bfin: setting system clock to 1970-12-23 10:41:15 UTC (30796875)
IP-Config: Complete:
device=eth0, addr=10.100.4.50, mask=255.255.255.0, gw=10.100.4.174,
host=bf537-stamp, domain=, nis-domain=(none),
bootserver=10.100.4.174, rootserver=10.100.4.174, rootpath=
Freeing unused kernel memory: 2980k freed
dma_alloc_init: dma_page @ 0x00457000 - 256 pages at 0x03f00000
_____________________________________
a8888b. / Welcome to the uClinux distribution \
d888888b. / _ _ \
8P"YP"Y88 / | | |_| __ __ (TM) |
8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |
8' .88 \ | | | | _ \| | | | \ / |
8`._.' Y8. \ | |__ | | | | | |_| | / \ |
d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |
dP . Y8b. \ For embedded processors including |
d8:' " `::88b \ the Analog Devices Blackfin /
d8" 'Y88b \___________________________________/
:8P ' :888
8a. : _a88P For further information, check out:
._/"Yaa_: .| 88P| - blackfin.uclinux.org/
\ YP" `| 8P `. - docs.blackfin.uclinux.org/
/ \.___.d| .' - www.uclinux.org/
`--..__)8888P`._.' jgs/a:f - www.analog.com/blackfin
Have a lot of fun...
BusyBox v1.13.3 (2009-03-18 12:21:15 CST) built-in shell (msh)
Enter 'help' for a list of built-in commands.
root:/> PHY: 0:01 - Link is Up - 100/Full
root:/>
root:/> PHY: 0:01 - Link is Down
root:/> ls /dev/
console ppi0 ram14 ram9
cpu_dma_latency ptmx ram15 random
full pts ram2 rtc0
kmsg ram0 ram3 tty
log ram1 ram4 ttyBF0
mem ram10 ram5 urandom
network_latency ram11 ram6 watchdog
network_throughput ram12 ram7 zero
null ram13 ram8
root:/> ppitest m
fd(3) = open(/dev/ppi)
Enter Line length (default = 16):
Enter number of lines (default = 8):
beMaster()
Setting up master...new gImageSize( 35CA004 ) = 0x100 (256)
device ioctl error: Invalid argument
Master set up complete...further input is transmited to slave
Enter fill pattern [CcQqRrTtVvHh?]: c
fillBuffer(35CA004, 16, 8, 'c', 0x0)
1 2 3 4 5 6 7 8 9 A B C D E F 10
Bellow is the log for slave:
root:/> ls/dev/
root:/> ppitest s
beSlave()
new gImageSize( 35F0004 ) = 0x100 (256)
Setting up slave...to read 256 bytesSlave set up complete...following output is received from master...
Follow-ups
--- Michael Hennerich 2009-03-18 05:05:04
Looks like you don't have a PPI clock connected.
Can you place a wire on the BF537-EZKIT from U4 (output of the 12MHz
oscillator) to PPI CLK?
-Michael
--- Vivi Li 2009-03-18 07:01:31
We now connect pin 27 of PPI port on two 537 boards. Pin 27 of PPI should be
connected with PPI_CLK of U35.
What's the difference if we connect it to U4?
--- Michael Hennerich 2009-03-18 13:04:00
PPI CLK is an input on both boards/Blackfin Processors.
You need to connect PPI CLK also with a clock source.
U4 is a 12.288 MHz oscillator.
--- Vivi Li 2009-03-30 02:52:46
As I can not find U4 in bf537-stamp, so I use a bf537-ezkit board connecting to
a bf537-stamp, and in that ezkit board I connect R54(MCLK output) to pin 27 of
PPI.
PPI test still fails with the same error info.
--- Michael Hennerich 2009-04-16 04:27:19
>device ioctl error: Invalid argument
Sorry I just noticed that I forgot to commit necessary changes for the ppitest
application.
I just corrected my failure.
Can you try again?
--- raghu mulagada 2009-04-27 00:26:57
hi Micheal,
i'am also facing the same problem
can you tell me what changes are to be made
and where to make them
thanks
raghu
--- Vivi Li 2009-06-25 07:03:51
I found that the result of master and slave side is not exactly the same. I
think character 10 is missing in slave side.
master side:
Setting up master...new gImageSize( 34B8004 ) = 0x100 (256)
fillBuffer(34B8004, 16, 8, 'c', 0x0)PPI Error: PPI Status = 0x2000
1 2 3 4 5 6 7 8 9 A B C D E F
10
slave side:
new gImageSize( 34B1004 ) = 0x100 (256)
Setting up slave...to read 256 bytesSlave set up complete...following output is
received from master...
PPI Error: PPI Status = 0x200
1
2 3 4 5 6 7 8 9 A B C D E F 1
2
3 4 5 6 7 8 9 A B C D E F 1 2
3
4 5 6 7 8 9 A B C D E F 1 2 3
4
5 6 7 8 9 A B C D E F 1 2 3 4
5
6 7 8 9 A B C D E F 1 2 3 4 5
6
7 8 9 A B C D E F 1 2 3 4 5 6
7
8 9 A B C D E F F 10 F 10 F 10 F
--- Michael Hennerich 2009-07-03 08:20:41
Good catch.
During my initial testing I used a slightly modified ppitest utility.
Which sets ioctl CMD_PPI_FS1_EOL_BLANKING to something > 0.
This is actually required in order to avoid line track errors.
Fixed on 2009R1 and trunk.
In case you still see PPI Error messages print.
Flip the priority of IRQ_ERROR and IRQ_PPI.
(8) IRQ_ERROR: CAN MAC SPORT0 SPORT1 SPI UART0 UART1
(8) IRQ_RTC
(7) IRQ_PPI
--- Vivi Li 2009-07-07 06:12:34
The result is much better now.
But when I test it with fill pattern Q/q, it shows with following results.
At master side:
Setting up master...new gImageSize( 811004 ) = 0x100 (256)
Enter fill pattern [CcQqRrTtVvHh?]: q
fillBuffeP(811004, 16, 8, 'q', 0xDEAD)PI Error: PPI Status = 0x2000
EAD EAD EAD EAD EAD EAD EAD EAD EAD EAD EAD EAD EAD EAD EAD
EAD
Done
At slave side:
new gImageSize( BCB004 ) = 0x100 (256)
E2D E2D E2D E2D E2D E2D E2D E2D E2D E2D E2D E2D E2D E2D E2D
E2D
F38 F38 F38 F38 F38 F38 F38 F38 F38 F38 F38 F38 F38 F38 F38
F38
Is it correct that F38 shows up at slave side?
--- Michael Hennerich 2009-07-07 11:20:45
Q stands for Quit and will send 0xEAD to the Slave.
In case the Slave receives this sequence it will quit.
Exactly this happens in my test setup.
So I bet your board wiring flipped some upper PPI Data Strobes.
Not a software bug.
See below -
On the MASTER board:
Setting up master...new gImageSize( 336004 ) = 0x100 (256)
Enter fill pattern [CcQqRrTtVvHh?]: Q
fillBuffPr(3PI Error: PPI Status = 0x2000
On the SALVE board:
new gImageSize( 3786004 ) = 0x100 (256)
--- Vivi Li 2009-07-08 04:26:41
I need to set SW4.3 OFF, so PG7 can work.
It works alright between bf537-ezkit and bf537-stamp now.
--- Vivi Li 2009-07-13 00:47:56
Close this bug.
Files
Changes
Commits
Dependencies
Duplicates
Associations
Tags
File Name File Type File Size Posted By
config.kernel application/octet-stream 26328 Vivi Li
config.user application/octet-stream 45592 Vivi Li