[#5133] dmacopy test failed for bf561-ezkit when copy between L2 and SDRAM

Submitted By: Vivi Li

Open Date

2009-05-15 06:52:08 Close Date

2009-05-20 22:21:46

Priority:

Medium High Assignee:

Mike Frysinger

Status:

Closed Fixed In Release:

N/A

Found In Release:

N/A Release:

Category:

Tests Board:

N/A

Processor:

BF561 Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

gcc4.1-09r1_rc6

App binary format:

N/A

Summary: dmacopy test failed for bf561-ezkit when copy between L2 and SDRAM

Details:

dmacopy test failed for bf561-ezkit when copy between L2 and SDRAM with w/4 or w/16 bytes.

The last pass time is 2009_May_06_19_45.

Bellow is the log:

TEST: --- SRAM (L2) <-> SDRAM w/4 bytes ---^M

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]^M

FAIL: dma_memcpy(chk, src) test case 19, memcmp result is -16^M

offsets differ: 0...3^M

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]^M

FAIL: dma_memcpy(dst, chk) test case 19, memcmp result is 16^M

offsets differ: 0...3^M

PASS: dma_memcpy(dst, src) test case 19, memcmp result is 0^M

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]^M

FAIL: dma_memcpy(chk, src) test case 20, memcmp result is -16^M

offsets differ: 0...1^M

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]^M

FAIL: dma_memcpy(dst, chk) test case 20, memcmp result is 16^M

offsets differ: 0...1^M

PASS: dma_memcpy(dst, src) test case 20, memcmp result is 0^M

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]^M

FAIL: dma_memcpy(chk, src) test case 21, memcmp result is -16^M

offsets differ: 0...2^M

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]^M

FAIL: dma_memcpy(dst, chk) test case 21, memcmp result is 16^M

offsets differ: 0...2^M

PASS: dma_memcpy(dst, src) test case 21, memcmp result is 0^M

TEST: --- SRAM (L2) <-> SDRAM w/16 bytes ---^M

PASS: dma_memcpy SDRAMx32[s] to SRAMx32[c]^M

FAIL: dma_memcpy(chk, src) test case 22, memcmp result is -16^M

offsets differ: 0...15^M

PASS: dma_memcpy SRAMx32[c] to SDRAMx32[d]^M

FAIL: dma_memcpy(dst, chk) test case 22, memcmp result is 16^M

offsets differ: 0...15^M

PASS: dma_memcpy(dst, src) test case 22, memcmp result is 0^M

PASS: dma_memcpy SDRAMx16[s] to SRAMx16[c]^M

FAIL: dma_memcpy(chk, src) test case 23, memcmp result is -16^M

offsets differ: 0...13^M

PASS: dma_memcpy SRAMx16[c] to SDRAMx16[d]^M

FAIL: dma_memcpy(dst, chk) test case 23, memcmp result is 16^M

offsets differ: 0...13^M

PASS: dma_memcpy(dst, src) test case 23, memcmp result is 0^M

PASS: dma_memcpy SDRAMx8[s] to SRAMx8[c]^M

FAIL: dma_memcpy(chk, src) test case 24, memcmp result is -16^M

offsets differ: 0...14^M

PASS: dma_memcpy SRAMx8[c] to SDRAMx8[d]^M

FAIL: dma_memcpy(dst, chk) test case 24, memcmp result is 16^M

offsets differ: 0...14^M

PASS: dma_memcpy(dst, src) test case 24, memcmp result is 0^M

Follow-ups

--- Mike Frysinger 2009-05-19 01:16:11

you didnt post your kernel config, but i'm going to guess it's because you have

L2 policy set to enable caching. the bfin_addr_dcachable() function assumes

memory after _ramend is not cachable so the dma_memcpy() does not do any

flushing on the L2 src/dst.

--- Vivi Li 2009-05-19 05:46:40

Do you mean the bellow option should be set to "Not cached"?

L2 SRAM cache policy^M

1. Write back (BFIN_L2_WB)

> 2. Write through (BFIN_L2_WT)

3. Not cached (BFIN_L2_NOT_CACHED)

choice[1-3]:

I attach the config file this time.

--- Mike Frysinger 2009-05-19 06:27:56

if disabling the L2 cache makes the test complete, then the issue is probably

what i alluded to

--- Mike Frysinger 2009-05-19 08:58:30

ive tested and committed a fix

--- Vivi Li 2009-05-20 22:21:46

ok now. close it. Thanks!

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