[#5448] BF561SMP kernel may can't boot up

Submitted By: Graf Yang

Open Date

2009-08-18 00:25:42 Close Date

2009-09-22 00:12:05

Priority:

Medium Assignee:

Graf Yang

Status:

Closed Fixed In Release:

N/A

Found In Release:

2010R1 Release:

Category:

N/A Board:

EZKIT Lite

Processor:

BF561 Silicon Revision:

0.5

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

any Toolchain version or rev.:

09r1

App binary format:

N/A

Summary: BF561SMP kernel may can't boot up

Details:

It sticked at:

Linux version 2.6.28.10-ADI-2009R1-svn7194 (ymm@uboot32-533ezkit) (gcc version 4.1.2 (ADI svn)) #4 SMP 9

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x00103c40

rodata = 0x00103c40-0x00150894

bss = 0x00151000-0x00163104

data = 0x00163120-0x00174000

stack = 0x00172000-0x00174000

init = 0x00174000-0x00808000

available = 0x00808000-0x03eff000

DMA Zone = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Boot Mode: 0

Reset caused by Software reset

Compiled for ADSP-BF561 Rev 0.5

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 600 MHz core clock and 100 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

Data Cache Enabled for CPU0 (write-through)

Built 1 zonelists in Zone order, mobility grouping off. Total pages: 16001

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=30000000 earlyprintk=serial,uart0,57600 console=ttf

Configuring Blackfin Priority Driven Interrupts

PID hash table entries: 256 (order: 8, 1024 bytes)

console [ttyBF0] enabled, bootconsole disabled

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 55688k/65536k RAM, (6736k init code, 1035k kernel code, 449k data, 1024k dma, 600k re)

Calibrating delay loop... 1191.93 BogoMIPS (lpj=2383872)

Security Framework initialized

Mount-cache hash table entries: 512

CoreB bootstrap code to SRAM ff600000 via DMA.

Booting Core B.

Follow-ups

--- Graf Yang 2009-08-18 05:34:05

Fixed, use handle_percpu_irq to instead of handle_simple_irq.

If the core timer interrupter come at the same time, only one core will service

it, if it is always be serviced by CoreB, all the system do not move.

--- Graf Yang 2009-09-22 00:12:05

Fixed a long time ago, close it.

Files

Changes

Commits

Dependencies

Duplicates

Associations