[#5630] ethernet driver smc91x fail to wake up by uart in bf533-stamp

Submitted By: Vivi Li

Open Date

2009-10-19 23:19:30 Close Date

2009-10-20 23:28:45

Priority:

Medium Assignee:

Michael Hennerich

Status:

Closed Fixed In Release:

N/A

Found In Release:

2010R1 Release:

Category:

N/A Board:

STAMP

Processor:

BF533 Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

gcc4.1-09r1-rc9

App binary format:

N/A

Summary: ethernet driver smc91x fail to wake up by uart in bf533-stamp

Details:

After wake up by uart in bf533-stamp, error message shows up in for smc91x.

BF533-EZKIT is OK.

Linux version 2.6.31.4-ADI-2010R1-pre-svn7669 (test@uclinux77-bf533-ad1836-spi) (gcc version 4.1.2 (ADI svn)) #84 Sun Oct 18 01:9

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Limiting kernel memory to 56MB due to anomaly 05000263

Board Memory: 128MB

Kernel Managed Memory: 128MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x0010b690

rodata = 0x0010b690-0x001623dc

bss = 0x00163000-0x001739bc

data = 0x001739bc-0x00184000

stack = 0x00182000-0x00184000

init = 0x00184000-0x007b3000

available = 0x007b3000-0x037ff000

DMA Zone = 0x07f00000-0x08000000

Hardware Trace Active and Enabled

Boot Mode: 0

Compiled for ADSP-BF533 Rev 0.3

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 497 MHz core clock and 99 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

External memory: cacheable in instruction cache

Data Cache Enabled for CPU0

External memory: cacheable (write-back) in data cache

Built 1 zonelists in Zone order, mobility grouping off. Total pages: 14223

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=11059200 earlyprintk=serial,uart0,57600 ip=10.100.4.50:10.100.4.174:10.100.f

PID hash table entries: 256 (order: 8, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 48888k/131072k RAM, (6332k init code, 1065k kernel code, 483k data, 1024k dma, 73280k reserved)

NR_IRQS:49

Configuring Blackfin Priority Driven Interrupts

bfin-rtc: invalid date; resetting

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 991.23 BogoMIPS (lpj=1982464)

Security Framework initialized

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 64 KB (52 KB free)

NET: Registered protocol family 16

Blackfin DMA Controller

stamp_init(): registering device resources

bio: create slab <bio-0> at 0

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

NET: Registered protocol family 1

msgmni has been set to 95

io scheduler noop registered

io scheduler anticipatory registered (default)

io scheduler cfq registered

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 21) is a BFIN-UART

brd: module loaded

smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>

eth0: SMC91C11xFD (rev 1) at 20300300 IRQ 40 [nowait]

eth0: Ethernet addr: 00:e0:22:fe:45:76

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@5

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 1970-01-01 00:00:01 UTC (1)

eth0: link down

IP-Config: Complete:

device=eth0, addr=10.100.4.50, mask=255.255.255.0, gw=10.100.4.174,

host=bf533-stamp, domain=, nis-domain=(none),

bootserver=10.100.4.174, rootserver=10.100.4.174, rootpath=

Freeing unused kernel memory: 6332k freed

eth0: link up, 100Mbps, full-duplex, lpa 0x41E1

_____________________________________

a8888b. / Welcome to the uClinux distribution \

d888888b. / _ _ \

8P"YP"Y88 / | | |_| __ __ (TM) |

8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |

8' .88 \ | | | | _ \| | | | \ / |

8`._.' Y8. \ | |__ | | | | | |_| | / \ |

d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |

dP . Y8b. \ For embedded processors including |

d8:' " `::88b \ the Analog Devices Blackfin /

d8" 'Y88b \___________________________________/

:8P ' :888

8a. : _a88P For further information, check out:

._/"Yaa_: .| 88P| - http://blackfin.uclinux.org/

\ YP" `| 8P `. - http://docs.blackfin.uclinux.org/

/ \.___.d| .' - http://www.uclinux.org/

`--..__)8888P`._.' jgs/a:f - http://www.analog.com/blackfin

Have a lot of fun...

BusyBox v1.15.2 (2009-10-17 18:33:30 MDT) hush - the humble shell

root:/> echo enabled > /sys/class/tty/ttyBF0/power/wakeup

root:/> cat /sys/class/tty/ttyBF0/power/wakeup

enabled

root:/> echo standby > /sys/power/state

PM: Syncing filesystems ... done.

Freezing user space processes ... (elapsed 0.00 seconds) done.

Freezing remaining freezable tasks ... (elapsed 0.00 seconds) done.

Suspending console(s) (use no_console_suspend to debug)

eth0: link down

Restarting tasks ... done.

root:/> eth0: timeout drivers/net/smc91x.c line 751

eth0: timeout drivers/net/smc91x.c line 755

eth0: timeout drivers/net/smc91x.c line 751

eth0: timeout drivers/net/smc91x.c line 755

eth0: timeout drivers/net/smc91x.c line 751

eth0: timeout drivers/net/smc91x.c line 755

eth0: timeout drivers/net/smc91x.c line 751

(same messages come out and can not stop...)

Follow-ups

--- Michael Hennerich 2009-10-20 08:33:58

This was a ******* to debug ...

On the BF533-STAMP board there is some external logic that switches the

Asynchronous Memory Bank 3 between Flash and SMSC91c111 Ethernet controller.

This logic is controlled by GPIO_PF0 which is also the same PIN as SPI-SPISS

Slave Mode Select. The SPI driver defaults the SPI Control register to Slave

Mode - but doesn't enable the SPI. In case the SPI bus driver wasn't utilized

and is then suspended and resumed during the PM state transitions - the SPI

resume code enables the SPI - and this will case the SPI-SPISS = GPIO_PF0 being

driven low. In return this causes the Flash being enabled and the smc91x

Ethernet driver accesses Flash instead of the Ethernet controller.

Fixed by defaulting SPI_CTL to Master Mode after SPI driver init.

Checked into trunk and 2009R1

-Michael

--- Vivi Li 2009-10-20 23:28:45

OK now. Close it.

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