[#5708] Kernel can not boot up when spimmc driver is interrupt drivern in PIO mode

Submitted By: Vivi Li

Open Date

2009-11-19 22:14:33 Close Date

2010-02-22 05:01:59

Priority:

Medium High Assignee:

Yi Li

Status:

Closed Fixed In Release:

N/A

Found In Release:

2010R1 Release:

Category:

N/A Board:

STAMP

Processor:

BF537 Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

gcc4.3-trunk

App binary format:

N/A

Summary: Kernel can not boot up when spimmc driver is interrupt drivern in PIO mode

Details:

Kernel can not boot up when spimmc driver is interrupt drivern in PIO mode.

pio_interrupt is set to 1 in linux-2.6.x/arch/blackfin/mach-bf537/boards/stamp.c. Configuration is the same with spimmc of poll modein PIO.

Linux version 2.6.31.6-ADI-2010R1-pre-svn7848 (test@uclinux58-mmc-usblan-btuart) (gcc version 4.3.4 (ADI-trunk/svn-3679) ) #54 F9

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Limiting kernel memory to 56MB due to anomaly 05000263

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x00121ff0

rodata = 0x00121ff0-0x0017fdb0

bss = 0x00180000-0x00190b5c

data = 0x00190b5c-0x001a2000

stack = 0x001a0000-0x001a2000

init = 0x001a2000-0x008c4000

available = 0x008c4000-0x037ff000

DMA Zone = 0x03f00000-0x04000000

Hardware Trace Active and Enabled

Boot Mode: 0

Compiled for ADSP-BF537 Rev 0.2

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 500 MHz core clock and 125 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

External memory: cacheable in instruction cache

Data Cache Enabled for CPU0

External memory: cacheable (write-back) in data cache

Built 1 zonelists in Zone order, mobility grouping off. Total pages: 14223

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=25000000 earlyprintk=serial,uart0,57600 console=ttyBF0,57600 ip=10.100.4.50f

PID hash table entries: 256 (order: 8, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 47796k/65536k RAM, (7304k init code, 1155k kernel code, 513k data, 1024k dma, 7744k reserved)

NR_IRQS:98

Configuring Blackfin Priority Driven Interrupts

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 995.32 BogoMIPS (lpj=1990656)

Security Framework initialized

Mount-cache hash table entries: 512

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 48 KB (36 KB free)

NET: Registered protocol family 16

Blackfin DMA Controller

stamp_init(): registering device resources

bio: create slab <bio-0> at 0

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

NET: Registered protocol family 1

msgmni has been set to 93

io scheduler noop registered

io scheduler anticipatory registered (default)

io scheduler cfq registered

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART

brd: module loaded

bfin_mii_bus: probed

bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=24)@sclk=125MHz)

bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7

rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

mmc_spi spi0.4: ASSUMING SPI bus stays unshared!

mmc_spi spi0.4: ASSUMING 3.2-3.4 V slot power

mmc_spi spi0.4: SD/MMC host mmc0, no DMA, no WP, no poweroff

TCP cubic registered

NET: Registered protocol family 17

rtc-bfin rtc-bfin: setting system clock to 2015-05-03 23:40:13 UTC (1430696413)

(it hangs here)

Follow-ups

--- Yi Li 2009-12-07 03:10:21

Fixed. disable_irq() will wait for any pending irq handler to complete before

returning. We use disable_irq_nosync() instead.

--- Vivi Li 2010-02-22 05:01:10

OK. Close it.

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