[#5737] For 09r1.1 kernel, ltp cases randomly crash on bf537-stamp

Submitted By: Vivi Li

Open Date

2009-12-02 23:04:05 Close Date

2009-12-10 22:41:32

Priority:

Medium High Assignee:

Sonic Zhang

Status:

Closed Fixed In Release:

N/A

Found In Release:

2009R1-RC6 Release:

Category:

Tests Board:

N/A

Processor:

BF537 Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

gcc4.1_2009r1.1-rc1

App binary format:

N/A

Summary: For 09r1.1 kernel, ltp cases randomly crash on bf537-stamp

Details:

For 09r1.1 kernel, ltp cases will randomly crash on bf537-stamp.

Most of the crash is in the kernel with wb_slab config.

Bellow is the example.

flock02 crashed in kernel with wb_slab config.

flock02^M

Data access CPLB miss^M

- Used by the MMU to signal a CPLB miss on a data access.^M

Deferred Exception context^M

CURRENT PROCESS:^M

COMM=flock02 PI

---crash

!!!! recovering

!!!! hit ENTER

D=1099^M

CPU = 0^M

TEXT = 0x00240040-0x0024b0c0 DATA = 0x0024b0e0-0x0024dd24^M

BSS = 0x0024dd24-0x00252bd0 USER-STACK = 0x0025af4c^M

return address: [0x00245592]; contents of:^M

0x00245570: 304a 6088 0901 1c05 3042 0c41 67f0 0608 ^M

0x00245580: ae79 e14a 0024 e10a c4dc b209 324a 6ff9 ^M

0x00245590: 6c09 [9948] 0901 17fd e140 0024 e100 c4cc ^M

0x002455a0: 3220 4411 5a49 e140 0024 e100 c4bc 5aa1 ^M

ADSP-BF537-0.2 500(MHz CCLK) 125(MHz SCLK) (mpu off)^M

Linux version 2.6.28.10-ADI-2009R1.1-svn7904^M

Built with gcc version 4.1.2 (ADI svn)^M

SEQUENCER STATUS: Not tainted^M

SEQSTAT: 00000026 IPEND: 0030 SYSCFG: 0006^M

EXCAUSE : 0x26^M

interrupts disabled^M

physical IVG5 asserted : <0xffa00c54> { _evt_ivhw + 0x0 }^M

RETE: <0x00000000> /* Maybe null pointer? */^M

RETN: <0x001b2000> /* kernel dynamic memory */^M

RETX: <0x00000480> /* Maybe fixed code section */^M

RETS: <0x00244f72> [ flock02 + 0x4f32 ]^M

PC : <0x00245592> [ flock02 + 0x5552 ]^M

DCPLB_FAULT_ADDR: <0x04000000> /* kernel dynamic memory */^M

ICPLB_FAULT_ADDR: <0x00245592> [ flock02 + 0x5552 ]^M

PROCESSOR STATE:^M

R0 : 00000000 R1 : 0024c4a4 R2 : 00000000 R3 : 00000001^M

R4 : 00000001 R5 : 0024b088 R6 : 00000057 R7 : fffffff6^M

P0 : 00000001 P1 : 04000000 P2 : 0024c4dc P3 : 00000008^M

P4 : 0025ad10 P5 : 0024b1f4 FP : 0025ae2c SP : 001b1f24^M

LB0: 00245db1 LT0: 00245dae LC0: 00000000^M

LB1: 002450bd LT1: 002450bc LC1: 00000000^M

B0 : 00000000 L0 : 00000000 M0 : 00000000 I0 : 0024b1f4^M

B1 : 00000000 L1 : 00000000 M1 : 00000000 I1 : 0025af50^M

B2 : 00000000 L2 : 00000000 M2 : 00000000 I2 : 00000000^M

B3 : 00000000 L3 : 00000000 M3 : 00000000 I3 : 00000000^M

A0.w: 00000035 A0.x: 00000000 A1.w: 00000035 A1.x: 00000000^M

USP : 0025acf4 ASTAT: 02001004^M

Hardware Trace:^M

0 Target : <0x00004cc0> { _trap_c + 0x0 }^M

Source : <0xffa00696> { _exception_to_level5 + 0xae } ^M

1 Target : <0xffa005e8> { _exception_to_level5 + 0x0 }^M

Source : <0xffa004a4> { _bfin_return_from_exception + 0x20 } ^M

2 Target : <0xffa00484> { _bfin_return_from_exception + 0x0 }^M

Source : <0xffa00540> { _ex_trap_c + 0x6c } ^M

3 Target : <0xffa003b0> { _ex_dcplb_miss + 0x0 }^M

Source : <0xffa003aa> { _ex_workaround_261 + 0x1a } ^M

4 Target : <0xffa00390> { _ex_workaround_261 + 0x0 }^M

Source : <0xffa00770> { _trap + 0x68 } ^M

5 Target : <0xffa00728> { _trap + 0x20 }^M

Source : <0xffa00724> { _trap + 0x1c } ^M

6 Target : <0xffa00708> { _trap + 0x0 }^M

Source : <0x00245590> [ flock02 + 0x5550 ] 0x6c09^M

7 Target : <0x00245591> [ flock02 + 0x5551 ]^M

Source : <0x00245596> [ flock02 + 0x5556 ] IF CC JUMP^M

8 Target : <0x00245590> [ flock02 + 0x5550 ]^M

Source : <0xffa00c52> { __common_int_entry + 0xda } ^M

9 Target : <0xffa00bf0> { __common_int_entry + 0x78 }^M

Source : <0xffa008f8> { _system_call + 0xb8 } ^M

10 Target : <0xffa008f4> { _system_call + 0xb4 }^M

Source : <0xffa008e4> { _system_call + 0xa4 } ^M

11 Target : <0xffa008de> { _system_call + 0x9e }^M

Source : <0xffa008ce> { _system_call + 0x8e } ^M

12 Target : <0xffa008ae> { _system_call + 0x6e }^M

Source : <0xffa00a8c> { _schedule_and_signal_from_int + 0x34 } ^M

13 Target : <0xffa00a8a> { _schedule_and_signal_from_int + 0x32 }^M

Source : <0x0000166e> { _finish_atomic_sections + 0x32 } RTS^M

14 Target : <0x00001668> { _finish_atomic_sections + 0x2c }^M

Source : <0x00001658> { _finish_atomic_sections + 0x1c } IF !CC JUMP^M

15 Targ

!!!! hit Control-C

et : <0x0000163c> { _finish_atomic_sections + 0x0 }^M

Source : <0xffa00a86> { _schedule_and_signal_from_int + 0x2e } ^M

Userspace Stack^M

Stack info:^M

SP: [0x0025acf4] <0x0025acf4> [ flock02 + 0x1acf4 ]^M

FP: (0x0025ae2c)^M

Memory from 0x0025acf0 to 0025b000^M

0025acf0: 0025ad10 [0025ad10] 00000000 00000000 00000000 00000000 0025ad14 00000000 ^M

0025ad10: 0024b1f6 ffffffff 00000000 00000064 00000000 00000020 00000000 00000001 ^M

0025ad30: 00000006 00010000 00000000 00000008 00000008 00000008 00000008 00000008 ^M

0025ad50: 00000008 00000008 00000008 0025aed0 0000044b 00000000 00000000 00000000 ^M

0025ad70: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ^M

0025ad90: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ^M

0025adb0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ^M

0025add0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ^M

0025adf0: 10000000 <0024692c> 00000000 0025aeb8 <00242b7a> 00000030 00242bd4 0024ec60 ^M

0025ae10: 00000000 00000000 00000037 00000000 00000000 00000000 0025ad60 (0025ae9c)^M

0025ae30:<0024480e> 0024b0e0 0024dd20 0025af50 ffdb133b <0024ec8c> 0024b088 00000001 ^M

0025ae50: 0025ae5c 0024dbb4 0024dd20 002400d0 fffffffe 0024ecc4 ffffffff 0024eccc ^M

0025ae70: 0024ecc4 0024ecc4 ffffffff 0024c4a4 <002411ba> 0024b0e0 00000000 <0024ec8c>^M

0025ae90: 0024b088 00000500 00000005 (0025aebc)<002447ce> 00000000 00000000 00000000 ^M

0025aeb0: 0025aed4 0025aecc 0025aecc (0025aed4)<0024046c> 00000001 00242bd4 0000044b ^M

0025aed0: 0025aef4 (0025aef4)<00240190> 00000001 0025af50 00000000 00000000 0024b0e0 ^M

0025aef0: 00000000 (0025af0c)<00247a68> 00000000 00000001 0025af50 00000000 (00000000)^M

0025af10:<00423084> 0024b0e0 00640004 00180430 00000000 001803cc 001802e4 00000001 ^M

0025af30: 0024013c 00000000 00000000 0024b088 0024b09a 00000000 00640782 00000001 ^M

0025af50: 0025af77 00000000 0025af7f <0025af9e> 0025afa7 0025afae 0025afbc 0025afe4 ^M

0025af70: 00000000 66000000 6b636f6c 63003230 676e6168 776f5f65 3d72656e 6e69622f ^M

0025af90: 6168632f 5f65676e 656e776f 4d540072 742f3d50 4800706d 3d454d4f 4853002f ^M

0025afb0: 3d4c4c45 6e69622f 0068732f 48544150 69622f3d 752f3a6e 622f7273 2f3a6e69 ^M

0025afd0: 6e696273 73752f3a 62732f72 2f3a6e69 006e6962 4d524554 6e696c3d 2f007875 ^M

0025aff0: 2f6e6962 636f6c66 0032306b 00000000 ^M

Return addresses in stack:^M

address : <0x0024692c> [ flock02 + 0x68ec ]^M

address : <0x00242b7a> [ flock02 + 0x2b3a ]^M

frame 1 : <0x0024480e> [ flock02 + 0x47ce ]^M

address : <0x0024ec8c> [ flock02 + 0xec8c ]^M

address : <0x002411ba> [ flock02 + 0x117a ]^M

address : <0x0024ec8c> [ flock02 + 0xec8c ]^M

frame 2 : <0x002447ce> [ flock02 + 0x478e ]^M

frame 3 : <0x0024046c> [ flock02 + 0x42c ]^M

frame 4 : <0x00240190> [ flock02 + 0x150 ]^M

frame 5 : <0x00247a68> [ flock02 + 0x7a28 ]^M

frame 6 : <0x00423084> [ sh + 0x23084 ]^M

address : <0x0025af9e> [ flock02 + 0x1af9e ]^M

Follow-ups

--- Sonic Zhang 2009-12-06 22:58:19

May be related to wrong macro used in bfin_mac CSUM offload patch. It is fixed.

Please retest.

--- Vivi Li 2009-12-10 22:41:14

OK now. So close it.

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