[#5783] sport uart test fails to receive data on bf537 0.3 stamp board
Submitted By: Mingquan Pan
Open Date
2009-12-18 05:13:44 Close Date
2010-06-11 04:17:15
Priority:
Medium Assignee:
Sonic Zhang
Status:
Closed Fixed In Release:
N/A
Found In Release:
2010R1 Release:
Category:
N/A Board:
N/A
Processor:
BF537 Silicon Revision:
0.3
Is this bug repeatable?:
Yes Resolution:
Rejected
Uboot version or rev.:
Toolchain version or rev.:
09r1.1-2
App binary format:
N/A
Summary: sport uart test fails to receive data on bf537 0.3 stamp board
Details:
sport uart test fails to receive data on bf537 0.3 stamp board, while the same connection works for 0.2 silicon.
## Booting kernel from Legacy Image at 02000000 ...
Image Name: Linux-2.6.28.10-ADI-2009R1.1-svn
Created: 2009-12-18 4:30:34 UTC
Image Type: Blackfin Linux Kernel Image (gzip compressed)
Data Size: 4682473 Bytes = 4.5 MB
Load Address: 00001000
Entry Point: 00188808
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Starting Kernel at = 00188808
Linux version 2.6.28.10-ADI-2009R1.1-svn8001 (test@my-local-machine) (gcc version 4.1.2 (ADI svn)) #28 Fri Dec 18 12:30:21 CST 2009
bootconsole [early_shadow0] enabled
bootconsole [early_BFuart0] enabled
early printk enabled on early_BFuart0
Board Memory: 64MB
Kernel Managed Memory: 64MB
Memory map:
fixedcode = 0x00000400-0x00000490
text = 0x00001000-0x00105250
rodata = 0x00105250-0x00156434
bss = 0x00157000-0x00168720
data = 0x00168720-0x0017a000
stack = 0x00178000-0x0017a000
init = 0x0017a000-0x008c4000
available = 0x008c4000-0x03eff000
DMA Zone = 0x03f00000-0x04000000
Hardware Trace Active and Enabled
Boot Mode: 0
Reset caused by Software reset
Blackfin support (C) 2004-2009 Analog Devices, Inc.
Compiled for ADSP-BF537 Rev 0.3
Blackfin Linux support by http://blackfin.uclinux.org/
Processor Speed: 500 MHz core clock and 125 MHz System Clock
NOMPU: setting up cplb tables
Instruction Cache Enabled for CPU0
Data Cache Enabled for CPU0 (write-back)
Built 1 zonelists in Zone order, mobility grouping off. Total pages: 16001
Kernel command line: root=/dev/mtdblock0 rw earlyprintk=serial,uart0,57600 ip=10.100.4.50 ip=10.100.4.50:10.100.4.174:10.100.4.174:255.255.255.0:bf537-stamp:eth0:off
Configuring Blackfin Priority Driven Interrupts
PID hash table entries: 256 (order: 8, 1024 bytes)
console [ttyBF0] enabled, bootconsole disabled
console [ttyBF0] enabled, bootconsole disabled
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory available: 54964k/65536k RAM, (7464k init code, 1040k kernel code, 468k data, 1024k dma, 572k reserved)
Calibrating delay loop... 995.32 BogoMIPS (lpj=1990656)
Security Framework initialized
Mount-cache hash table entries: 512
Blackfin Scratchpad data SRAM: 4 KB
Blackfin L1 Data A SRAM: 16 KB (15 KB free)
Blackfin L1 Data B SRAM: 16 KB (16 KB free)
Blackfin L1 Instruction SRAM: 48 KB (37 KB free)
net_namespace: 288 bytes
NET: Registered protocol family 16
Blackfin DMA Controller
stamp_init(): registering device resources
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
NET: Registered protocol family 1
msgmni has been set to 107
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler cfq registered
Serial: Blackfin serial driver
bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 18) is a BFIN-UART
bfin-uart.1: ttyBF1 at MMIO 0xffc02000 (irq = 20) is a BFIN-UART
bfin-sport-uart.0: ttySS0 at MMIO 0xffc00800 (irq = 12) is a SPORT0
bfin-sport-uart.1: ttySS1 at MMIO 0xffc00900 (irq = 14) is a SPORT1
brd: module loaded
bfin_mii_bus: probed
bfin_mac: attached PHY driver [SMSC LAN83C185] (mii_bus:phy_addr=0:01, irq=-1, mdc_clk=2500000Hz(mdc_div=24)@sclk=125MHz)
bfin_mac bfin_mac.0: Blackfin on-chip Ethernet MAC driver, Version 1.1
bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@7
rtc-bfin rtc-bfin: rtc core: registered rtc-bfin as rtc0
bfin-wdt: initialized: timeout=20 sec (nowayout=0)
TCP cubic registered
NET: Registered protocol family 17
rtc-bfin rtc-bfin: setting system clock to 1970-01-10 19:06:47 UTC (846407)
IP-Config: Complete:
device=eth0, addr=10.100.4.50, mask=255.255.255.0, gw=10.100.4.174,
host=bf537-stamp, domain=, nis-domain=(none),
bootserver=10.100.4.174, rootserver=10.100.4.174, rootpath=
Freeing unused kernel memory: 7464k freed
dma_alloc_init: dma_page @ 0x008c1000 - 256 pages at 0x03f00000
_____________________________________
a8888b. / Welcome to the uClinux distribution \
d888888b. / _ _ \
8P"YP"Y88 / | | |_| __ __ (TM) |
8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |
8' .88 \ | | | | _ \| | | | \ / |
8`._.' Y8. \ | |__ | | | | | |_| | / \ |
d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |
dP . Y8b. \ For embedded processors including |
d8:' " `::88b \ the Analog Devices Blackfin /
d8" 'Y88b \___________________________________/
:8P ' :888
8a. : _a88P For further information, check out:
._/"Yaa_: .| 88P| - http://blackfin.uclinux.org/
\ YP" `| 8P `. - http://docs.blackfin.uclinux.org/
/ \.___.d| .' - http://www.uclinux.org/
`--..__)8888P`._.' jgs/a:f - http://www.analog.com/blackfin
Have a lot of fun...
BusyBox v1.13.4 (2009-12-18 12:26:10 CST) built-in shell (msh)
Enter 'help' for a list of built-in commands.
root:/> vePHY: 0:01 - Link is Up - 100/Full
rsion
kernel: Linux release 2.6.28.10-ADI-2009R1.1-svn8001, build #28 Fri Dec 18 12:30:21 CST 2009
toolchain: bfin-uclinux-gcc release gcc version 4.1.2 (ADI svn)
user-dist: release svn-9271, build #13 Fri Dec 18 12:29:34 CST 2009
root:/> successful boot attempt
Starting test for UART ...
test@uclinux61-bf548-std:~/work/cruise/checkouts/uclinux-dist/testsuites/serial> telnet 10.100.4.50
Trying 10.100.4.50...
Connected to 10.100.4.50.
Escape character is '^]'.
BusyBox v1.13.4 (2009-12-18 12:26:10 CST) built-in shell (msh)
Enter 'help' for a list of built-in commands.
root:/>
root:/> cat /proc/kallsyms > ccc
root:/> stty -F /dev/ttySS0 cs8 ispeed 57600 ospeed 57600 -icrnl -ixon igncr -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echok
e -hupcl -echoctl min 1 time 0
root:/> cat /dev/ttySS0 > aaa
test@uclinux61-bf548-std:~/work/cruise/checkouts/uclinux-dist/testsuites/serial> rcp root@10.100.4.50:/ccc .
xon igncr -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoke -hupcl -echoctl min 1 time 08 ispeed 57600 ospeed 57600 -icrnl -i
test@uclinux61-bf548-std:~/work/cruise/checkouts/uclinux-dist/testsuites/serial> cat ccc > /dev/ttyS0
test@uclinux61-bf548-std:~/work/cruise/checkouts/uclinux-dist/testsuites/serial> ^C
root:/>
root:/> Catted file is got on target.
diff -u ccc aaa
--- ccc Sat Jan 10 19:06:58 1970
+++ aaa Sat Jan 10 19:08:30 1970
@@ -1,7654 +1,776 @@
-00001000 T _do_one_initcall
-00001000 T __stext
-00001000 T _text
-00001000 T __text
-00001164 t _run_init_process
-0000117c t _init_post
-00001250 T _name_to_dev_t
-00001458 t _kernel_thread_helper
-00001464 T _dump_fpu
-00001470 T _flush_thread
-0000147c T _copy_thread
Follow-ups
--- Sonic Zhang 2010-01-07 05:29:43
Not a bug.
There is a Audio Select Switch SW7 on the bf537-ezkit v2.2. This is set to all
on by default, which connect sport0 to the on board audio codec ad1871. Disable
all pin of SW7 before do sport uart testing.
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