[#5899] change cpu freq on 561 smp kernel doesn't change Calibration values
Submitted By: Mingquan Pan
Open Date
2010-02-12 03:46:16 Close Date
2010-03-16 23:03:36
Priority:
Medium Assignee:
Graf Yang
Status:
Closed Fixed In Release:
N/A
Found In Release:
2010R1 Release:
Category:
N/A Board:
N/A
Processor:
BF561 Silicon Revision:
Is this bug repeatable?:
Yes Resolution:
Fixed
Uboot version or rev.:
Toolchain version or rev.:
4.3.4 (ADI-trunk/svn-3815)
App binary format:
N/A
Summary: change cpu freq on 561 smp kernel doesn't change Calibration values
Details:
change cpu freq on 561 smp kernel doesn't change Calibration values.
Linux version 2.6.32.8-ADI-2010R1-pre-svn8298 (test@uclinux65-561-SMP) (gcc version 4.3.4 (ADI-trunk/svn-3815) ) #12 SMP Fri Feb 12 15:58:38 GMT 2010
cat /proc/cpuinfo
processor : 0
vendor_id : Analog Devices
cpu family : 0x27bb
model name : ADSP-BF561 600(MHz CCLK) 100(MHz SCLK) (mpu off)
stepping : 5
cpu MHz : 600.000/100.000
bogomips : 2097.15
Calibration : 1048576000 loops
cache size : 16 KB(L1 icache) 32 KB(L1 dcache) 0 KB(L2 cache)
dbank-A/B : cache/cache
external memory : cacheable in instruction cache
external memory : cacheable (write-through) in data cache
icache setup : 4 Sub-banks/4 Ways, 32 Lines/Way
dcache setup : 2 Super-banks/4 Sub-banks/2 Ways, 64 Lines/Way
SMP Dcache Flushes : 5374
SMP Icache Flushes : 0
processor : 1
vendor_id : Analog Devices
cpu family : 0x27bb
model name : ADSP-BF561 600(MHz CCLK) 100(MHz SCLK) (mpu off)
stepping : 5
cpu MHz : 600.000/100.000
bogomips : 2097.15
Calibration : 1048576000 loops
cache size : 16 KB(L1 icache) 32 KB(L1 dcache) 0 KB(L2 cache)
dbank-A/B : cache/cache
external memory : cacheable in instruction cache
external memory : cacheable (write-through) in data cache
icache setup : 4 Sub-banks/4 Ways, 32 Lines/Way
dcache setup : 2 Super-banks/4 Sub-banks/2 Ways, 64 Lines/Way
SMP Dcache Flushes : 6062
SMP Icache Flushes : 0
L2 SRAM : 128KB
L2 SRAM : uncacheable in instruction cache
L2 SRAM : uncacheable in data cache
board name : ADI BF561-EZKIT
board memory : 65536 kB (0x(null) -> 0x04000000)
kernel memory : 64508 kB (0x00001000 -> 0x03f00000)
root:/usr/bin>
Case 3 ...PASS
cpufreq-set -f 300000
root:/usr/bin>
Case 4 ...PASS
cat /proc/cpuinfo
processor : 0
vendor_id : Analog Devices
cpu family : 0x27bb
model name : ADSP-BF561 300(MHz CCLK) 100(MHz SCLK) (mpu off)
stepping : 5
cpu MHz : 300.000/100.000
bogomips : 2097.15
Calibration : 1048576000 loops
cache size : 16 KB(L1 icache) 32 KB(L1 dcache) 0 KB(L2 cache)
dbank-A/B : cache/cache
external memory : cacheable in instruction cache
external memory : cacheable (write-through) in data cache
icache setup : 4 Sub-banks/4 Ways, 32 Lines/Way
dcache setup : 2 Super-banks/4 Sub-banks/2 Ways, 64 Lines/Way
SMP Dcache Flushes : 7184
SMP Icache Flushes : 0
processor : 1
vendor_id : Analog Devices
cpu family : 0x27bb
model name : ADSP-BF561 300(MHz CCLK) 100(MHz SCLK) (mpu off)
stepping : 5
cpu MHz : 300.000/100.000
bogomips : 2097.15
Calibration : 1048576000 loops
cache size : 16 KB(L1 icache) 32 KB(L1 dcache) 0 KB(L2 cache)
dbank-A/B : cache/cache
external memory : cacheable in instruction cache
external memory : cacheable (write-through) in data cache
icache setup : 4 Sub-banks/4 Ways, 32 Lines/Way
dcache setup : 2 Super-banks/4 Sub-banks/2 Ways, 64 Lines/Way
SMP Dcache Flushes : 7904
SMP Icache Flushes : 0
L2 SRAM : 128KB
L2 SRAM : uncacheable in instruction cache
L2 SRAM : uncacheable in data cache
board name : ADI BF561-EZKIT
board memory : 65536 kB (0x(null) -> 0x04000000)
kernel memory : 64508 kB (0x00001000 -> 0x03f00000)
root:/usr/bin>
Follow-ups
--- Graf Yang 2010-03-07 22:01:29
I have commit a patch to scale the calibration value when changing cpu freq.
--- Mingquan Pan 2010-03-16 23:02:25
Yes,fixed. Close.
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