[#6835] bf561 SMP kernel will crash sometimes since this September(2011)

[#6835] bf561 SMP kernel will crash sometimes since this September

Submitted By: Vivi Li

Open Date

2011-10-20 22:38:48 Close Date

2011-10-31 05:01:09

Priority:

Medium High Assignee:

Sonic Zhang

Status:

Closed Fixed In Release:

N/A

Found In Release:

2011R1 Release:

Category:

N/A Board:

N/A

Processor:

BF561 Silicon Revision:

Is this bug repeatable?:

Yes Resolution:

Fixed

Uboot version or rev.:

Toolchain version or rev.:

gcc4.3-2011R1-RC2

App binary format:

N/A

Summary: bf561 SMP kernel will crash sometimes since this September

Details:

bf561 SMP kernel will crash sometimes since this September.

Some ltp test case will fail due to kernel crash.

Please run following command to reproduce crash:

while [ 1 ] ; do dmesg | grep MPU; sleep 1; done

Bellow is the error log:

Linux version 3.0.0-ADI-2011R1-pre-svn10097 (test@uclinux65-561-SMP) (gcc version 4.3.5 (ADI-2011R1-RC2) ) #15 SMP Wed Oct 19 161

bootconsole [early_shadow0] enabled

bootconsole [early_BFuart0] enabled

early printk enabled on early_BFuart0

Board Memory: 64MB

Kernel Managed Memory: 64MB

Memory map:

fixedcode = 0x00000400-0x00000490

text = 0x00001000-0x00135210

rodata = 0x00135220-0x001912fc

bss = 0x00192000-0x001a3498

data = 0x001a34a0-0x001b6000

stack = 0x001b4000-0x001b6000

init = 0x001b6000-0x00773000

available = 0x00773000-0x03f00000

DMA Zone = 0x03f00000-0x04000000

Hardware Trace active and enabled

Boot Mode: 0

Compiled for ADSP-BF561 Rev 0.5

Blackfin Linux support by http://blackfin.uclinux.org/

Processor Speed: 600 MHz core clock and 100 MHz System Clock

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

External memory: cacheable in instruction cache

L2 SRAM : uncacheable in instruction cache

Data Cache Enabled for CPU0

External memory: cacheable (write-through) in data cache

L2 SRAM : uncacheable in data cache

PERCPU: Embedded 7 pages/cpu @007f8000 s4480 r8192 d16000 u32768

Built 1 zonelists in Zone order, mobility grouping off. Total pages: 16002

Kernel command line: root=/dev/mtdblock0 rw clkin_hz=30000000 earlyprintk=serial,uart0,57600 console=ttyBF0,57600 ip=10.100.4.50f

PID hash table entries: 256 (order: -2, 1024 bytes)

Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)

Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Memory available: 56244k/65536k RAM, (5876k init code, 1232k kernel code, 516k data, 1024k dma, 644k reserved)

Hierarchical RCU implementation.

NR_IRQS:153

Configuring Blackfin Priority Driven Interrupts

console [ttyBF0] enabled, bootconsole disabled

Calibrating delay loop... 1185.79 BogoMIPS (lpj=2371584)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 512

Booting Core B.

Brought up 2 CPUs

Instruction Cache Enabled for CPU1

External memory: cacheable in instruction cache

L2 SRAM : uncacheable in instruction cache

Data Cache Enabled for CPU1

External memory: cacheable (write-through) in data cache

L2 SRAM : uncacheable in data cache

SMP: Total of 2 processors activated (2371.58 BogoMIPS).

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 16 KB (15 KB free)

Blackfin L2 SRAM: 128 KB (127 KB free)

NET: Registered protocol family 16

Blackfin DMA Controller

ezkit_init(): registering device resources

bio: create slab <bio-0> at 0

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs@ffc00500, dma channel@16

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 2048 (order: 2, 16384 bytes)

TCP bind hash table entries: 2048 (order: 2, 16384 bytes)

TCP: Hash tables configured (established 2048 bind 2048)

TCP reno registered

UDP hash table entries: 128 (order: 0, 4096 bytes)

UDP-Lite hash table entries: 128 (order: 0, 4096 bytes)

NET: Registered protocol family 1

debug-mmrs: setting up Blackfin MMR debugfs

msgmni has been set to 109

io scheduler noop registered (default)

bfin-uart: Blackfin serial driver

bfin-uart.0: ttyBF0 at MMIO 0xffc00400 (irq = 35) is a BFIN-UART

brd: module loaded

physmap platform flash device: 00800000 at 20000000

physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x000020 Chip ID 0x0022ed

Amd/Fujitsu Extended Query Table at 0x0040

Amd/Fujitsu Extended Query version 1.3.

physmap-flash.0: Swapping erase regions for top-boot CFI table.

number of CFI chips: 1

Using physmap partition information

Creating 5 MTD partitions on "physmap-flash.0":

0x000000000000-0x000000040000 : "bootloader(nor)"

0x000000040000-0x000000200000 : "linux kernel(nor)"

0x000000200000-0x0000007f0000 : "file system(nor)"

0x0000007f0000-0x0000007fe000 : "config(nor)"

0x0000007fe000-0x000000800000 : "u-boot env(nor)"

smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>

eth0: SMC91C11xFD (rev 2) at 2c010300 IRQ 82 [nowait]

eth0: Ethernet addr: 00:e0:22:fe:ba:29

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

TCP cubic registered

NET: Registered protocol family 17

smc91x smc91x.0: eth0: link down

smc91x smc91x.0: eth0: link up, 100Mbps, full-duplex, lpa 0x41E1

IP-Config: Complete:

device=eth0, addr=10.100.4.50, mask=255.255.255.0, gw=10.100.4.174,

host=bf561-ezkit, domain=, nis-domain=(none),

bootserver=10.100.4.174, rootserver=10.100.4.174, rootpath=

dma_alloc_init: dma_page @ 0x027b8000 - 256 pages at 0x03f00000

Freeing unused kernel memory: 5876k freed

_____________________________________

a8888b. / Welcome to the uClinux distribution \

d888888b. / _ _ \

8P"YP"Y88 / | | |_| __ __ (TM) |

8|o||o|88 _____/ | | _ ____ _ _ \ \/ / |

8' .88 \ | | | | _ \| | | | \ / |

8`._.' Y8. \ | |__ | | | | | |_| | / \ |

d/ `8b. \ \____||_|_| |_|\____|/_/\_\ |

dP . Y8b. \ For embedded processors including |

d8:' " `::88b \ the Analog Devices Blackfin /

d8" 'Y88b \___________________________________/

:8P ' :888

8a. : _a88P For further information, check out:

._/"Yaa_: .| 88P| - http://blackfin.uclinux.org/

\ YP" `| 8P `. - http://docs.blackfin.uclinux.org/

/ \.___.d| .' - http://www.uclinux.org/

`--..__)8888P`._.' jgs/a:f - http://www.analog.com/blackfin

Have a lot of fun...

BusyBox v1.18.4 (2011-10-19 16:36:04 GMT) hush - the humble shell

root:/>

root:/> version

kernel: Linux release 3.0.0-ADI-2011R1-pre-svn10097, build #15 SMP Wed Oct 19 16:38:44 GMT 2011

toolchain: bfin-uclinux-gcc release gcc version 4.3.5 (ADI-2011R1-RC2)

user-dist: release svn-10446, build #111 Wed Oct 19 16:36:48 GMT 2011

root:/>

root:/> dmesg | grep MPU

NOMPU: setting up cplb tables

root:/> dmesg | grep MPU

NOMPU: seNtingULp cLlb t plesointer access

KNOMeU: srntine up lp b OableO

PS in progress

Deferred Exception context

CURRENT PROCESS:

COMM=dmesg PID=186 CPU=1

TEXT = 0x02b00040-0x02b54d80 DATA = 0x02b54da0-0x02b697d0

BSS = 0x02b697d0-0x02b6b1b0 USER-STACK = 0x02b74f80

return address: [0x0005f64a]; contents of:

0x0005f620: 5581 0c06 1f46 a129 cc04 0211 a168 0000

0x0005f630: 67f9 67f8 5401 3210 a3e8 5c92 304a 4f19

0x0005f640: 5008 3220 ace7 a062 a0a1 [9138] 0c00 1f31

0x0005f650: 5091 cc04 0032 b232 0000 e121 1000 0a08

ADSP-BF561-0.5 600(MHz CCLK) 100(MHz SCLK) (mpu off)

Linux version 3.0.0-ADI-2011R1-pre-svn10097 (test@uclinux65-561-SMP) (gcc version 4.3.5 (ADI-2011R1-RC2) ) #15 SMP Wed Oct 19 161

SEQUENCER STATUS: Not tainted

SEQSTAT: 0000c027 IPEND: 8008 IMASK: ffff SYSCFG: 0006

EXCAUSE : 0x27

physical IVG3 asserted : <0x0000b16c> { _trap + 0x0 }

physical IVG15 asserted : <0x0000badc> { _evt_system_call + 0x0 }

logical irq 6 mapped : <0x00007a0c> { _bfin_coretmr_interrupt + 0x0 }

logical irq 35 mapped : <0x000bbdd4> { _bfin_serial_dma_rx_int + 0x0 }

logical irq 36 mapped : <0x000bbb88> { _bfin_serial_dma_tx_int + 0x0 }

logical irq 69 mapped : <0x0000c7ec> { _ipi_handler_int0 + 0x0 }

logical irq 70 mapped : <0x0000c80c> { _ipi_handler_int1 + 0x0 }

logical irq 82 mapped : <0x000d5f80> { _smc_interrupt + 0x0 }

RETE: <0x00000000> /* Maybe null pointer? */

RETN: <0x02931db8> /* kernel dynamic memory (maybe user-space) */

RETX: <0x00000480> /* Maybe fixed code section */

RETS: <0x0005f4a0> { _pipe_write + 0x3c }

PC : <0x0005f64a> { _pipe_write + 0x1e6 }

DCPLB_FAULT_ADDR: <0x00000000> /* Maybe null pointer? */

ICPLB_FAULT_ADDR: <0x0005f64a> { _pipe_write + 0x1e6 }

PROCESSOR STATE:

R0 : 027b9278 R1 : 00000000 R2 : 00000100 R3 : 00000001

R4 : 02b19e9c R5 : 02b6a070 R6 : 00000100 R7 : 02931e94

P0 : feb00000 P1 : 0283d948 P2 : 0000000f P3 : 00000100

P4 : 027b9278 P5 : 0207c360 FP : 00000000 SP : 02931cdc

LB0: 02b0c81b LT0: 02b0c812 LC0: 0000000e

LB1: 028926c3 LT1: 028926b8 LC1: 00000000

B0 : 00000000 L0 : 00000000 M0 : 00000004 I0 : 02b74feb

B1 : 00000000 L1 : 00000000 M1 : 00000000 I1 : 02b621b8

B2 : 00000000 L2 : 00000000 M2 : 00000000 I2 : 02b74ebc

B3 : 00000000 L3 : 00000000 M3 : 00000000 I3 : 00000000

A0.w: 00000000 A0.x: 00000000 A1.w: 00000000 A1.x: 00000000

USP : 02b74e34 ASTAT: 02002000

Hardware Trace:

0 Target : <0x00004554> { _trap_c + 0x0 }

Source : <0x0000b100> { _exception_to_level5 + 0xb4 } JUMP.L

1 Target : <0x0000b04c> { _exception_to_level5 + 0x0 }

Source : <0x0000aef0> { _bfin_return_from_exception + 0x20 } RTX

2 Target : <0x0000aed0> { _bfin_return_from_exception + 0x0 }

Source : <0x0000afa4> { _ex_trap_c + 0x84 } JUMP.S

3 Target : <0x0000af20> { _ex_trap_c + 0x0 }

Source : <0x0000b220> { _trap + 0xb4 } JUMP (P4)

4 Target : <0x0000b1c6> { _trap + 0x5a }

Source : <0x0000b1c2> { _trap + 0x56 } IF CC JUMP pcrel

5 Target : <0x0000b1b0> { _trap + 0x44 }

Source : <0x0000b19c> { _trap + 0x30 } IF !CC JUMP pcrel

6 Target : <0x0000b16c> { _trap + 0x0 }

FAULT : <0x0005f64a> { _pipe_write + 0x1e6 } R0 = [P7]

Source : <0x0005f648> { _pipe_write + 0x1e4 } P1 = W[P4 + 2]

7 Target : <0x0005f61a> { _pipe_write + 0x1b6 }

Source : <0x0005f4ae> { _pipe_write + 0x4a } IF !CC JUMP pcrel (BP)

8 Target : <0x0005f4a0> { _pipe_write + 0x3c }

Source : <0x00134892> { _mutex_lock + 0x2a } RTS

9 Target : <0x0013487c> { _mutex_lock + 0x14 }

Source : <0x0000d316> { ___raw_atomic_update_asm + 0x1a } RTS

10 Target : <0x0000d312> { ___raw_atomic_update_asm + 0x16 }

Source : <0x0000d012> { _put_core_lock + 0x1a } RTS

11 Target : <0x0000cff8> { _put_core_lock + 0x0 }

Source : <0x0000d30e> { ___raw_atomic_update_asm + 0x12 } JUMP.L

12 Target : <0x0000d306> { ___raw_atomic_update_asm + 0xa }

Source : <0x0000cfc4> { _get_core_lock + 0x40 } RTS

13 Target : <0x0000cfa8> { _get_core_lock + 0x24 }

Source : <0x0000cf98> { _get_core_lock + 0x14 } IF CC JUMP pcrel

14 Target : <0x0000cf84> { _get_core_lock + 0x0 }

Source : <0x0000d302> { ___raw_atomic_update_asm + 0x6 } JUMP.L

15 Target : <0x0000d2fc> { ___raw_atomic_update_asm + 0x0 }

Source : <0x00134878> { _mutex_lock + 0x10 } CALL pcrel

Kernel Stack

Stack info:

SP: [0x02931f24] <0x02931f24> /* kernel dynamic memory (maybe user-space) */

Memory from 0x02931f20 to 02932000

02931f20: 7fffffff [02b02cd6] 00008000 0000c000 00000000 02932000 02b02cd6 02b02cd6

02931f40: 02b16036 0000bb40 02001004 028926c3 02b0c81b 028926b8 02b0c812 00000000

02931f60: 0000000e 00000000 00000000 00000000 00000000 00000000 00000000 00000000

02931f80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

02931fa0: 00000004 00000000 02b74ebc 02b621b8 02b74feb 02b74e34 02b74e40 02b6a070

02931fc0: 02b69188 02b69500 02938ef4 02b69188 00000004 00000100 00000100 7fffffff

02931fe0: 02b19e9c 00000010 00000100 02b6a070 00000001 00000001 00000004 00000006

Return addresses in stack:

Modules linked in:

Kernel panic - not syncing: Kernel exception

Hardware Trace:

Stack info:

SP: [0x02931be0] <0x02931be0> /* kernel dynamic memory (maybe user-space) */

FP: (0x02931ef8)

Memory from 0x02931be0 to 02932000

02931be0:[00164074] 00133520 02931cdc 00164074 00198b6f 00198b6f 00198b6f 02931c28

02931c00: 00000000 00004a34 02931cdc 00000001 00000100 00008008 0000000b 00000027

02931c20: 00000013 02931cdc 0000003f 0000001f 0019efd0 02931c5c 0003000b 0208ee94

02931c40: 00000001 0000041c 00000000 02009da0 00771c60 00000001 00011712 06400000

02931c60: 00010ad6 00800c60 00000000 00000000 00000000 00000000 00000001 00000000

02931c80: 001b23e0 0000002c 00000000 00000001 00000010 02009da0 0000d10c 0000003f

02931ca0: 00000000 00000001 008033e4 0000003f 00000000 0000b104 00194068 ffe02014

02931cc0: 00008008 0000c027 02b6a070 02b19e9c 020568c0 64ab5a41 00000480 00000480

02931ce0: 00008008 0000c027 00000000 02931db8 00000480 0005f64a 0005f4a0 027b9278

02931d00: 02002000 028926c3 02b0c81b 028926b8 02b0c812 00000000 0000000e 00000000

02931d20: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

02931d40: 00000000 00000000 00000000 00000000 00000000 00000000 00000004 00000000

02931d60: 02b74ebc 02b621b8 02b74feb 02b74e34 00000000 0207c360 027b9278 00000100

02931d80: 0000000f 0283d948 feb00000 02931e94 00000100 02b6a070 02b19e9c 00000001

02931da0: 00000100 00000000 027b9278 027b9278 feb00000 00000006 00000036 00000000

02931dc0: 000b6ec6 00000041 02930000 02930000 0207c390 0283d948 00000600 020a5c40

02931de0: 00000100 00000005 027b9200 02b74e40 <0005912e> 02931e24 020a5c40 02931ef0

02931e00: 02931e94 00000100 02b6a070 02b19e9c 00000000 02931e94 00000000 00000000

02931e20: 00000000 fffffffc 00000000 00000000 00000001 ffffffff 020a5c40 00000000

02931e40: 00000000 00000000 00000000 0208ee60 00000000 00000000 00000000 00000000

02931e60: 001a5304 00000081 00000100 00198fbc 00000100 00000070 01194000 00000001

02931e80: 00000000 00000000 00000000 02b74e40 00059972 02b6a070 00000100

02931ea0: 020a5c40 00000004 02b69500 02931ef0 00000001 00000100 7fffffff 02931ef0

02931ec0: 00000000 00000000 00059a3c 020a5c40 00000004 02b6a070 00000100 7fffffff

02931ee0: 00000067 02b69500 00000000 02931ef0 00000000 00000000 (00000000)<0000b36a>

02931f00: 00059a0c 00000000 ffffe000 02929ff4 02803d40 001a34a0 00000010 02b19e9c

02931f20: 7fffffff 02b02cd6 00008000 0000c000 00000000 02932000 02b02cd6 02b02cd6

02931f40: 02b16036 0000bb40 02001004 028926c3 02b0c81b 028926b8 02b0c812 00000000

02931f60: 0000000e 00000000 00000000 00000000 00000000 00000000 00000000 00000000

02931f80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

02931fa0: 00000004 00000000 02b74ebc 02b621b8 02b74feb 02b74e34 02b74e40 02b6a070

02931fc0: 02b69188 02b69500 02938ef4 02b69188 00000004 00000100 00000100 7fffffff

02931fe0: 02b19e9c 00000010 00000100 02b6a070 00000001 00000001 00000004 00000006

Return addresses in stack:

address : <0x0005912e> { _do_sync_write + 0x8e }

address : <0x00059928> { _vfs_write + 0x64 }

frame 1 : <0x0000b36a> { _system_call + 0x6a }

CPU0: stopping

Hardware Trace:

0 Target : <0x00133494> { _dump_stack + 0x0 }

Source : <0x0000c924> { _ipi_handler_int1 + 0x118 } CALL pcrel

1 Target : <0x0000c924> { _ipi_handler_int1 + 0x118 }

Source : <0x00133688> { _printk + 0x14 } RTS

2 Target : <0x00133684> { _printk + 0x10 }

Source : <0x0001a1f0> { _vprintk + 0x19c } RTS

3 Target : <0x0001a1e4> { _vprintk + 0x190 }

Source : <0x0001a1ba> { _vprintk + 0x166 } IF CC JUMP pcrel

4 Target : <0x0001a1b2> { _vprintk + 0x15e }

Source : <0x0001a35e> { _vprintk + 0x30a } JUMP.S

5 Target : <0x0001a35e> { _vprintk + 0x30a }

Source : <0x00019d78> { _console_unlock + 0x1e4 } RTS

6 Target : <0x00019d34> { _console_unlock + 0x1a0 }

Source : <0x00135122> { __raw_spin_unlock_irqrestore + 0x42 } RTS

7 Target : <0x0013511c> { __raw_spin_unlock_irqrestore + 0x3c }

Source : <0x001350f2> { __raw_spin_unlock_irqrestore + 0x12 } IF CC JUMP pcrel (BP)

8 Target : <0x001350ec> { __raw_spin_unlock_irqrestore + 0xc }

Source : <0x0000d1d2> { ___raw_spin_unlock_asm + 0x16 } RTS

9 Target : <0x0000d1d0> { ___raw_spin_unlock_asm + 0x14 }

Source : <0x0000d012> { _put_core_lock + 0x1a } RTS

10 Target : <0x0000cff8> { _put_core_lock + 0x0 }

Source : <0x0000d142> { _end_lock_coherent + 0x20 } JUMP.S

11 Target : <0x0000d122> { _end_lock_coherent + 0x0 }

Source : <0x0000d1cc> { ___raw_spin_unlock_asm + 0x10 } CALL pcrel

12 Target : <0x0000d1c4> { ___raw_spin_unlock_asm + 0x8 }

Source : <0x0000cfc4> { _get_core_lock + 0x40 } RTS

13 Target : <0x0000cfa8> { _get_core_lock + 0x24 }

Source : <0x0000cf98> { _get_core_lock + 0x14 } IF CC JUMP pcrel

14 Target : <0x0000cf84> { _get_core_lock + 0x0 }

Source : <0x0000d1c0> { ___raw_spin_unlock_asm + 0x4 } JUMP.L

15 Target : <0x0000d1bc> { ___raw_spin_unlock_asm + 0x0 }

Source : <0x001350e8> { __raw_spin_unlock_irqrestore + 0x8 } JUMP.L

Stack info:

SP: [0x001b5de4] <0x001b5de4> /* kernel dynamic memory (maybe user-space) */

Memory from 0x001b5de0 to 001b6000

001b5de0: 00000000 [0000003f] 0000c928 00000003 0000003f ffff2032 00000000 0000001f

001b5e00: ffe02104 <0003fa32> 02008b60 00000046 ffffffc0 00000046 00000000 00000000

001b5e20: 00000000 0019efcc <0001e728> 0019d4e0 00000007 001b4000 00000000 00041692

001b5e40: ffe05000 001a9080 001a4974 00000046 00000000 0000001f 02b036ee 001a9080

001b5e60: 0000000a 00000000 001920a0 <0003f6ae> 00771a60 0019efcc 00000000 00000006

001b5e80: 00000000 00004ac6 00004b32 00000000 00000000 00000000 0000b6e6 ffc00014

001b5ea0: ffe05000 0019d468 001b4008 00001e90 00000000 00000000 00000000 00001ed4

001b5ec0: 00008090 00000000 00000000 02934000 02b836ee 00001ed4 00001ea4 00000007

001b5ee0: 02002060 02b8d001 000a85b8 02b8cfb6 000a85b8 00000000 00000000 00000002

001b5f00: 00000000 00000002 00000000 00000000 00000000 00000000 00000000 00000000

001b5f20: 00000000 00000000 00000000 00000000 00000000 00000000 00000004 00000000

001b5f40: 02bf4e4c 0019f094 02011cdc 001b6000 001920a0 00001e90 ffe05000 0019d468

001b5f60: 00194008 00000001 001b4000 001b4008 00001e90 0000001f 02b036ee 00000004

001b5f80: 0000001f 00194000 0000ffff 0000ffff 001b4000 00000006 001b4008 00001e90

001b5fa0: 0000001f <00001e78> 0019ee34 00192000 0019200c 001b6000 001b6642 0019ee34

001b5fc0: 00192000 0019200c 001cbe24 00000000 00000000 00162010 001c9454 00191148

001b5fe0: 0000001b 001b61e4 001cbe24 001bd27a ffe00000 03f9f1c0 03f9ff80 ffb00000

Return addresses in stack:

address : <0x0003fa32> { _handle_irq_event_percpu + 0x32 }

address : <0x0001e728> { ___do_softirq + 0xdc }

address : <0x0003f6ae> { _generic_handle_irq + 0x2a }

address : <0x00001e78> { _cpu_idle + 0x58 }

Follow-ups

--- Sonic Zhang 2011-10-26 01:05:02

Fixed.

In blackfin SMP architecture, no cache coherence among cores is supppored by

hardware. Data protected

by spin lock or atomic operation are kept consistent by invalidating entired

local cache in spin lock APIs

and smp memory barrier APIs on the other cores.

In mutex fast path APIs, spin lock may not be called if the lock can be taken

by atomic operation.

So, smp memory barrier should be invoked to keep cache consistent for SMP

architecture without hardware

cache coherency support.

--- Sonic Zhang 2011-10-26 06:03:12

Finally, this bug is fixed in blackfin arch SMP atomic operations.

Some atomic operations imply smp memory barrier.

see the thread:

https://lkml.org/lkml/2011/5/29/233

--- Vivi Li 2011-10-31 05:09:37

OK in trunk and branch.

Close it.

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