[#4513] Fail to boot jffs2 kernel for BF561 with SMP patch
Submitted By: Vivi Li
Open Date
2008-10-13 22:49:58 Close Date
2008-11-11 01:53:49
Priority:
Medium Assignee:
Graf Yang
Status:
Closed Fixed In Release:
N/A
Found In Release:
N/A Release:
Category:
N/A Board:
N/A
Processor:
N/A Silicon Revision:
Is this bug repeatable?:
Yes Resolution:
Fixed
Uboot version or rev.:
Toolchain version or rev.:
toolchain-2008_Oct_10
App binary format:
N/A
Summary: Fail to boot jffs2 kernel for BF561 with SMP patch
Details:
Fail to boot jffs2 kernel for BF561 with SMP patch. Bellow is the log:
--
Linux version 2.6.26.5-ADI-2009R1-pre-svn5401-dirty (test@uclinux65-561-SMP) (gcc version 4.1.2 (ADI svn)) #4 SMP Mon Oct 13 18:11:44 GMT 2008^M
console [early_BFuart0] enabled^M
early printk enabled on early_BFuart0^M
Warning: limiting memory to 56MB due to hardware anomaly 05000263^M
Board Memory: 64MB^M
Kernel Managed Memory: 64MB^M
Memory map:^M
fixedcode = 0x00000400-0x00000490^M
text = 0x00001000-0x00126800^M
rodata = 0x00126800-0x0017ae08^M
bss = 0x0017ae20-0x0018ac74^M
data = 0x0018ac80-0x0019e000^M
stack = 0x0019c000-0x0019e000^M
init = 0x0019e000-0x001b9000^M
available = 0x001b9000-0x037ff000^M
DMA Zone = 0x03f00000-0x04000000^M
Hardware Trace Active and Enabled^M
Reset caused by Software reset^M
Blackfin support (C) 2004-2008 Analog Devices, Inc.^M
Compiled for ADSP-BF561 Rev 0.3^M
Warning: Compiled for Rev 3, but running on Rev 5^M
Blackfin Linux support by blackfin.uclinux.org/^M
Processor Speed: 600 MHz core clock and 50 MHz System Clock^M
NOMPU: setting up cplb tables for global access^M
NOMPU: setting up cplb tables for global access^M
Instruction Cache Enabled for CPU0^M
Data Cache Enabled for CPU0 (write-through)^M
Built 1 zonelists in Zone order, mobility grouping off. Total pages: 14223^M
Kernel command line: root=/dev/mtdblock2 rw rootfstype=jffs2 earlyprintk=serial,uart0,57600^M
Configuring Blackfin Priority Driven Interrupts^M
PID hash table entries: 256 (order: 8, 1024 bytes)^M
console handover: boot [early_BFuart0] -> real [ttyBF0]^M
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)^M
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)^M
Memory available: 54968k/65536k RAM, (108k init code, 1174k kernel code, 478k data, 1024k dma, 7784k reserved)^M
Security Framework initialized^M
Mount-cache hash table entries: 512^M
CoreB bootstrap code to SRAM ff600000 via DMA.^M
Booting Core B.^M
Instruction Cache Enabled for CPU1^M
Data Cache Enabled for CPU1 (write-through)^M
PDA for CPU1 reserved at ff700000^M
Brought up 2 CPUs^M
SMP: Total of 2 processors activated (1167.36 BogoMIPS).^M
Blackfin Scratchpad data SRAM: 4 KB^M
Blackfin Scratchpad data SRAM: 4 KB^M
Blackfin L1 Data A SRAM: 16 KB (16 KB free)^M
Blackfin L1 Data A SRAM: 16 KB (16 KB free)^M
Blackfin L1 Data B SRAM: 16 KB (16 KB free)^M
Blackfin L1 Data B SRAM: 16 KB (16 KB free)^M
Blackfin L1 Instruction SRAM: 16 KB (15 KB free)^M
Blackfin L1 Instruction SRAM: 16 KB (15 KB free)^M
Blackfin L2 SRAM: 128 KB (128 KB free)^M
PDA for CPU0 reserved at ffb00000^M
net_namespace: 200 bytes^M
NET: Registered protocol family 16^M
Blackfin GPIO Controller^M
Blackfin DMA Controller^M
ezkit_init(): registering device resources^M
NET: Registered protocol family 2^M
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)^M
TCP established hash table entries: 2048 (order: 2, 16384 bytes)^M
TCP bind hash table entries: 2048 (order: 2, 16384 bytes)^M
TCP: Hash tables configured (established 2048 bind 2048)^M
TCP reno registered^M
NET: Registered protocol family 1^M
JFFS2 version 2.2. (NAND) 
2001-2006 Red Hat, Inc.^M
msgmni has been set to 107^M
io scheduler noop registered^M
io scheduler anticipatory registered (default)^M
io scheduler cfq registered^M
Serial: Blackfin serial driver^M
bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 35) is a BFIN-UART^M
brd: module loaded^M
smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>^M
eth0: SMC91C11xFD (rev 2) at 2c010300 IRQ 82 [nowait]^M
eth0: Ethernet addr: 00:e0:22:fe:ba:2a^M
physmap platform flash device: 00800000 at 20000000^M
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank^M
Amd/Fujitsu Extended Query Table at 0x0040^M
physmap-flash.0: Swapping erase regions for broken CFI table.^M
number of CFI chips: 1^M
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.^M
RedBoot partition parsing not available^M
Using physmap partition information^M
Creating 3 MTD partitions on "physmap-flash.0":^M
0x00000000-0x00040000 : "bootloader(nor)"^M
0x00040000-0x00200000 : "linux kernel(nor)"^M
0x00200000-0x00800000 : "file system(nor)"^M
bfin-spi bfin-spi.0: Blackfin BF5xx on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@16^M
TCP cubic registered^M
NET: Registered protocol family 17^M
VFS: Mounted root (jffs2 filesystem).^M
Freeing unused kernel memory: 108k freed^M
dma_alloc_init: dma_page @ 0x001b3000 - 256 pages at 0x03f00000^M
--
Follow-ups
--- Graf Yang 2008-10-18 04:52:44
In cplb-nompu initial process, the lock_kernel_check() logic lost one case that
the cplb block embrace the kernel area, cause the kernel area cplb entry can be
swapped out. This cause the cplb_mgr double fault.
--- Vivi Li 2008-11-11 01:53:49
OK now. Close it.
Thanks!
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