Question 1

Where can I obtain the schematics for the BF537 STAMP board? Audit

Accepted Answer

Q : 
 Where can I obtain the schematics for the BF537 STAMP board? 
 
 .............................. 
 
 A : 
 Unfortunately we do not have schematics specifically for the BF537 STAMP board. The design for the BF537 EZ-Kit and BF537 STAMP board are the same. The differences between the two boards are, the STAMP board does not have the audio circuit and the debug agent. 
 
 The schematics for the BF537 EZ-Kit are attached to the BF537 EZ-Kit manual, you can find the latest version of this manual in our Technical Library . 
 
 For earlier versions of the schematics please refer to our BF537 legacy manuals, which are available in the below link: https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/bf537-ezlite.html#eb-documentation

Question 2

Why do the ADSP-218x DSPs have their own EZ-ICE emulator?

Accepted Answer

Q: 
 Why do the ADSP-218x DSPs have their own EZ-ICE emulator? 
 
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 A: 
 The ADSP-218x family of DSPs does not have a JTAG port like the rest of ADI's DSPs. Instead, they have a proprietary port that requires a different type of emulator. You can't use one of our JTAG based emulators ( HPPCI-ICE, USB/HPUSB-ICE) with a ADSP-218x system. Instead, you need to use the ADZS-218x-ICE-2.5V emulator. 
 
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 This FAQ was generated from the following thread: Why do the ADSP-218x DSPs have their own EZ-ICE emulator?

Question 3

Why do flash contents appear corrupt/incorrect within Memory Window

Accepted Answer

Q: 
 When viewing Flash contents using the Memory Window, I see incorrect values, and duplicates of the expected values. How can I use the Memory Window to view the contents of Flash. 
 ----------------------------------------------- 
 
 A: 
 If the flash is not a Parallel type, or is connected to the bus in some non-conventional way, such as SPI, PPI or Link Port Interface, then you cannot use the Memory Window to view the contents of the Flash. All reads/writes to this type of flash should be done using a suitable interface application (such as a Flash Programmer Driver). 
 If the flash is a parallel type flash connected to the ASYNC bus, you should be able to use the Memory window to view its contents. However, due to timing and other considerations when accessing flash, you may experience incorrect data, or repeated data in the memory window when viewing Parallel Flash locations. 
 This is caused by the optimized techniques the Emulator uses to access memory when reading from the target, some of which are incompatible with the access requirements of flash. For Blackfin processors, you can avoid these problems by enabling the option "Do Single Byte Memory Access" under 'Settings:Target Options' within the IDDE. 
 Note: Enabling this option disables many of the Emulator's optimized access, and will cause the load time of your DXE to increase significantly. For this reason, we recommend disabling 'Do single byte memory access' for general operation, and enable it only when you need to examine the contents of the Flash.

Question 4

Reading to/Writing From/Loading to SDRAM on older BF533 EZ-KIT Lite with VisualDSP++ 5.0 behaves incorrectly

Accepted Answer

Question 
 I am unable to correctly access/load to SDRAM on an older BF533 EZ-KIT Lite. Reading or writing SDRAM produces incorrect values or corrupted data, while loading code into SDRAM fails. Why is this? 
 ========================================== 
 Answer 
 Due to high customer demand and the low cost of memory the SDRAM on the BF533 EZ-KIT changed between board revs 1.6 and 1.7. The ADSP-BF533 EZ-KIT with board revision 1.6 and older has 32MByte of SDRAM whereas board revision 1.7 and newer has 64MByte of SDRAM. 
 This change in size requires a change in the EBIU_SDBCTL register setting. For the older 32MB part it should be set to 0x13, while the 64MB SDRAM requires that the EBIU_SDBCTL is set to 0x25. 
 CrossCore Embedded Studio and VisualDSP++ 5.0 use default EBIU_SDBCTL values for the 64MB part. This means that customers using the older boards will experience issues accessing SDRAM if the EBIU configuration is not changed. VisualDSP++ 5.0 and CrossCore Embedded Studio support Custom Board Support Files. These are XML files which you associate with a particular Session within the IDDE, and allow you to define some register reset definitions to override those in the default file in "...\System\Archdef\". You can find more information about this approach in the Help system: 
 [VisualDSP++] VisualDSP++ Help under &lsquo;Help&rsquo;->&rsquo;Contents&rsquo;->&rsquo;Graphical Environment&rsquo;->&rsquo;Custom Board Support&rsquo;. 
 [CrossCore Embedded Studio] CCES Help under &lsquo;Help&rsquo;->&rsquo;Contents&rsquo; and search with keyword " Custom Board Support". 
 Up to, and including, VisualDSP++ 4.5 the default EBIU_SDBCTL register value was for the 32MB part, and customers with revision 1.7 of the EZ- KIT who use the 'Use XML Reset Values' option must ensure that they have the correct SDRAM values set in ADSP-BF533-proc.xml. The settings for both revisions are contained in the xml file but the rev 1.6 settings are enabled by default. This file can be edited; however you should be aware that it is susceptible to being overwritten when an update is applied to your VisualDSP++ installation. 
 Attached are Custom Board Support files for both VisualDSP++ 5.0 and CrossCore Embedded Studio with the BF533 rev 1.6 and older (32MB) settings configured. 
 [VisualDSP++] In VisualDSP++ you can then associate the file with your session via 'Settings'->'Session'. 
 [CrossCore Embedded Studio] In CrossCore Embedded Studio you can associate the files with your session by going to the &ldquo;Custom Board Support&rdquo; tab for your Debug Configuration under &lsquo;Run&rsquo;->&rsquo;Debug Configurations&rsquo;. 
 
 Attachments: 
 
 CCES_Custom_resets.zip 
 VDSP_Custom_resets.zip

Question 5

How do you connect to an ADSP-218x EZ-KIT in VisualDSP++ 3.5?

Accepted Answer

Q: 
 I've just installed VisualDSP++ 3.5 for 16-Bit Processors. I'm using an ADSP-218x EZ-KIT Lite as the target. It does not appear in the Session list. How do I connect to my EZ-KIT? 
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 A: 
 In VisualDSP++ 3.5 you must first create a Platform in the Configurator before creating the appropriate session, as follows: 
 1. Open the VisualDSP++ Configurator utility from the VisualDSP++ 3.5 program group in the Windows Start menu. 
 2. Once open select either the 'ADSP-2181 EZ-KIT Lite via COM port' or 'ADSP-2189 EZ-KIT Lite via COM port' Platform Template depending on which EZ-KIT you have. 3. Click the copy button and the Platform Properties window will appear. 
 4. You should not need to make any changes in the Platform Properties window although ensure COM Port is set to 1 and that your EZ-KIT is attached to COM port 1 of your computer before continuing. 
 5. Hit OK, the Platform Properties window will close and you will notice that the Platform you just created appears under the Platforms section of the Configurator. 
 6. Hit OK to exit the Configurator utility. 
 7. Start VisualDSP++ while pressing and holding the CTRL key and the Session Window will load. 
 8. Select New Session and once loaded select 'EZ-KIT 218x' from the 'Debug Target' drop down list in the New Session window. 
 9. The Processor type should be either ADSP-2181 or ADSP-2189 and the Session Name should match what you created in the Configurator i.e. 'ADSP-2181 EZ-KIT Lite via COM port' . 
 10. Hit OK to close the New Session list window. 
 11. From the Session List window ensure your session is highlighted and select Activate. 
 12. You will be prompted to press the EZ-KIT reset button. Press this button and select OK from the prompt after doing so. 
 13. You should now be connected to your 218x EZ-KIT session. 
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 This FAQ was generated from the following thread: How do you connect to an ADSP-218x EZ-KIT in VisualDSP++ 3.5?

Question 6

Where can I obtain information regarding the layout and gerber files of my EZ-Kit board

Accepted Answer

Q : 
 Where can I obtain information regarding the layout and gerber files of my EZ-Kit board? 
 ----------------------- 
 A : 
 EZ-Kit Design Database contains all the design information you will need regarding the design of our EZ-Kit boards including information relating to Assembly, Fabrication, Layout and our EZ-Kit schematics. The only information missing from the Design Database regarding our EZ-Kit boards concerns our Debug Agent which is proprietary to ADI. 
 The EZ-Kit Design Databases can be found in the corresponding EZ-kits product page.

Question 7

What is the difference between the ADDS and ADZS part numbers?

Accepted Answer

Q: 
 What is the difference between the ADDS and ADZS part numbers, and which software versions support them? 
 ---------- 
 A: 
 From July 2006 new RoHS laws banned the placing on the EU market of new electrical and electronic equipment containing more than agreed levels of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyl (PBB) and polybrominated diphenyl ether (PBDE) flame retardants. You can find more information on RoHS on the analog web site . 
 Analog Devices CROSSCORE Development Tools product line redesigned all hardware products to comply with the European RoHS directive and introduced a new part numbering scheme to distinguish between the non-compliant and compliant products. Although all hardware was redesigned ADZS products are essentially functionally identical to the older ADDS products. Compliant part numbers for tools products are identified as "ADZS." For example: Old part # : ADDS-HPUSB-ICE New RoHs compliant part # : ADZS-HPUSB-ICE The following is list of tools that were not transitioned to be RoHS compliant and are now obsolete: ADDS-21992-EZLITE ADDS-2181-EZLITE ADDS-2101-EZ-ICE ADDS-TS101-EZLITE ADDS-BF535-EZLITE ADDS-HPPCI-ICE ADDS-21020-EZ-ICE 
 
 Minimum software requirements for non-RoHS HPUSB-ICE and USB-ICE emulators 
 For Blackfin or the 219x architecture the minimum software version required to work with the non-RoHS emulators is the base release of VisualDSP++ 3.5 for 16-bit processors. For the SHARC and TigerSHARC architecture the minimum requirements are VisualDSP++ 3.5 for 32-bit processors and the March 2004 update. 
 
 Minimum software requirements for RoHS compliant equipment 
 For Blackfin, SHARC and TigerSHARC the minimum software version required to work with the RoHS compliant emulators and EZ-Kits is VisualDSP++ 4.0 and the June 2006 update, or VisualDSP++ 4.5 and the July 2006 update. For the 219x the minimum version is VisualDSP++ 3.5 and the October 2006 update. Upgrades can be requested via email - processor.tools.support@analog.com. 
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 This FAQ was generated from the following thread: What is the difference between the ADDS and ADZS part numbers?

Question 8

What is the cause of a "Core fault detected before halt at address" error message?

Accepted Answer

Q: 
 What is the cause of a "Core fault detected before halt at address" error message? 
 
 .............................. 
 A: 
 The "Core fault detected before halt" message is the debugger reporting the core fault bit is set in one of the emulation control/status registers. This is not necessarily a catastrophic event, it could be the processor simply executed invalid instructions when coming out of reset before being halted. 
 
 In other cases, this is a catastrophic event. e.g. If, while debugging, the code causes a double core fault the emulator will display a similar message. However, in this case, there is no recovery possible. The most likely cause is that an exception has occurred while already executing the exception handler (or attempting to). 
 
 If the Core Fault is occurring immediately when you connect to VisualDSP++, it may be that the target board is booting bad code. You can determine if this is the case by changing the Boot Mode of the target to a different setting and checking if the behaviour persists. 
 
 A good technique for narrowing down the cause of a core fault is to use the Settings->Preferences menu and uncheck "Run to main after load". This will simply load the DXE without running it. If the load occurs correctly, start single stepping through the code until a failure occurs. 
 
 You could also try to use the Settings->Target options menu and check the "Verify all writes to memory" check box (in addition to the above). This will verify that the code downloaded to the target actually makes it to the target memory. 
 
 Another option is to use the statistical profiler. Before downloading, open the statistical profiler window. Then start the download (with the "run to main" option checked). In some cases, if there is a core fault, the statistical profiler will indicate the address or a function near the address where the core fault occurs, this can be seen because the reported address will be almost 100% of the profile. 
 
 One other thing to try, if you are using an HPPCI-ICE or an HPUSB-ICE, is to adjust the JTAG Frequency via 'Settings'->'JTAG Frequency'. Communication with the target may be more stable at a different frequency. 
 
 If you are still having problems narrowing down the issue please contact our private support channel at: processor.tools.support@analog.com providing the following information. Details of your version of VisualDSP++ along with a screenshot of VisualDSP++ with the disassembly window open when the Core Fault error is generated.

Question 9

I have an EZ-KIT Lite, but cannot find any example code in the VisualDSP++ installation. Where are these examples?

Accepted Answer

Question: I have an EZ-KIT Lite, but cannot find any example code in the VisualDSP++ installation. Where are these examples? 
 
 ----------------------------------------------------- 
 
 Answer: Examples for EZ-KIT Lites are made available in the VisualDSP++ Update that introduced support for that EZ-KIT Lite. Below are the most recent EZ-KITs, and the corresponding support in VisualDSP++ 5.0. 
 Blackfin 
 ADZS-BF548 EZ-KIT Lite - VisualDSP++ 5.0 (Base Release) 
 ADZS-BF527 EZ-KIT Lite - VisualDSP++ 5.0 Update 1 
 ADZS-BF526 EZ-KIT Lite - VisualDSP++ 5.0 Update 4 
 ADZS-BF518F EZ-KIT Lite - VisualDSP++ 5.0 Update 7 
 ADZS-BF506F EZ-KIT Lite - VisualDSP++ 5.0 Update 8 
 SHARC 
 ADZS-21371 EZ-KIT Lite - VisualDSP++ 5.0 Update 7 
 ADZS-21469 EZ-KIT Lite - VisualDSP++ 5.0 Update 7 
 ADZS-21479 EZ-KIT Lite - VisualDSP++ 5.0 Update 8 
 ADZS-21489 EZ-KIT Lite - VisualDSP++ 5.0 Update 8 
 Request for these updates can be sent to processor.tools.support@analog.com.

Question 10

How do you solve "EZ-ICE Driver (Fatal Firmware Error 174)" error?

Accepted Answer

Q: 
 I have encountered a "Fatal firmware error 174" when connecting to me 218x EZ-ICE emulator. What does it mean and how can I solve this problem? 
 
 .............................. 
 
 A: 
 The fatal firmware error 174 usually indicates that the emulator cannot communicate with the target DSP on your board. Before checking anything else, can you follow this procedure to delete any current EZ-KIT configuration, and try reconnecting to the target: 
 
 **Note: This procedure involves editing the registry. We recommend making a backup of the registry before proceeding** 
 
 1) Close out of the debugger and Hyper Terminal. 
 2) Go to START > Run and type in regedit. 
 3) Go to 'HKEY_CURRENT_USER' > 'Software' > 'Analog Devices' > 'VisualDSP++ 3.5 for 16-Bit Processors' > 'Targets' and delete the '218x ICE' entry. 
 4) Close the Registry Editor. 
 5) Now restart the VisualDSP++, holding CTRL until the Session Window is displayed. Delete any sessions, then go to New Session and create an EZ-ICE session for your target. 
 
 If you are still unable to connect to your target, this could mean a problem with the target DSP, or the emulation signals to the target DSP. Another cause could be a bad clkin signal to the DSP. If you are using a custom target board there is a possibility it may be a problem with its setup. A quick easy test to perform would be to try connecting the 218x EZ-ICE emulator to a known good target board, perhaps a 2181 EZ-KIT or a 2189M EZ-KIT if you have one available. If the error message subsides, then this is a problem with the custom target board. 
 
 If this is the case then please make sure your custom board is in compliance with the Analog Devices Application note EE-34 'Understanding 21xx/218x EZ-ICE Theory of Operation To Aid In Designing An EZ-ICE Compatible Target' , which Is attached to this thread. Please pay particular attention to section 1 and 2 on page 4 of the EE-note: 
 
 1) Bus Request 
 2) Pull-up all memory select signals high for EZ-ICE emulator compatibility. 
 
 Could you also check all of your connections: the header connection to the target, power supplies to both target and ICE, COM connection from ICE to PC, and ensure all are firm and stable.

This FAQ was generated from the following discussion: EZ-ICE Driver (Fatal Firmware Error 174) 
 
 Attachments: 
 
 8203.EE-34.pdf

Question 11

How can I test for faulty connections between my ICE and Target Board?

Accepted Answer

Question: 
 How can I test for faulty connections between my ICE and Target Board? 
 
 ============================== 
 
 Answer: 
 We provide an ICE Test Utility as part of the VisualDSP++ and CrossCore Embedded Tools. This utility can be used to test for faulty JTAG connections between your ICE and Hardware, as well as testing your hardware configuration. 
 
 The ICE Test is available from the Target Configurator by clicking the &lsquo;Test&hellip;&rsquo; button.

[VisualDSP++] 
 To invoke the VisualDSP++ Configurator from the Windows Start button choose Programs, Analog Devices, and then VisualDSP++ Configurator.

[CrossCore Embedded Studio (CCES)] 
 The Target Configurator in can be invoked by selecting Debug Configurations from the Run file menu within CrossCore Embedded Studio. 
 
 Alternatively you can right-click a project and choose either Run As > Run Configurations or Debug As > Debug Configurations from the context menu. Once the Run/Debug Configurations dialog box appears click Select Session from the Session tab of the Run/Debug Configurations dialog box. The Session Wizard appears. 
 
 Please see the VisualDSP++ or CrossCore Embedded Tools Help pages for details of each step in the ICE Test 
 or alternatively EE-175 or EE-356:

EE-175 - Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ 
 EE-356 - Emulator and Evaluation Hardware Troubleshooting Guide for CCES

---------- 
 
 This FAQ was generated from the following thread: How can I test for faulty connections between my ICE and Target Board?

Question 12

Can I use the Stand Alone Debug Agent board with my custom board?

Accepted Answer

Question : 
 Can I use the Stand Alone Debug Agent Board (ADZS-DBGAGENT-BRD or ADZS-SADA2-BRD) to connect to VisualDSP++ with my own custom board? 
 
 ----------- 
 
 Answer : 
 No, unfortunately you will not be able to use the Stand Alone Debug Agent (SADA) boards with your custom design. Our SADA boards can only be used with our new generation of EZ-Boards, which at the moment consist of the BF518F EZ-Board, BF526 EZ-board, BF609 EZ-Board, 21469 EZ-board, 21479 EZ-Board and the 21489 EZ-Board. 
 
 Both the ADZS-SADA2-BRD, and the ADZS-DBGAGENT-BRD which it superseded, offer the same functionality in that they are very similar to the Debug Agent on existing EZ-Kit Lites but have the flexibility to move from one EZ-Board to another. 
 
 Please note, although the ADZS-SADA2-BRD is compatible with the same boards as the old ADZS-DBGAGENT-BRD product, support for the ADZS-SADA2-BRD within VisualDSP++ 5.0 was not added until Update 9.1. If you are using VisualDSP++ 5.0 you must have Update 9.1, or later or CCES, installed to use the ADZS-SADA2-BRD.

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