MDMA transfer DSP to ARM with micrium OS

Hello,guys!

i have problems with MDMA transfer.

I take MDMA CrossCore example project ,and do changes towards ARM direction of data flow. So initialisation is the same(MCAPI addresses and SID of interrupt).

I have complex problem with it:

1. When i run project on debug with ICE-1000,and run DSP core sending data with MDMA, ARM core does not trigger. But when i do step by step execution of MDMA sending ARM core triggers, i can see data in DDR ARM zone buffer etc

2. When i run both cores eventually i get ard fault error

 Enabled interrupt with ID (IID) 0x7fffffff raised when it has no handler registered.

Here is code snippets from project:

MDMA open in DSP proj:

ADI_DMA_RESULT eResult = ADI_DMA_SUCCESS;
  //*************************************************************************
  // Open MDMA channel
  //*************************************************************************
  DBG_MSG ( "Core1: Opening MDMA channel\n");
  eResult = adi_mdma_Open (MEMCOPY_STREAM_ID, &MemDmaStreamMem[0],
               &hMemDmaStream, &hSrcDmaChannel, &hDestDmaChannel,
               NULL,
               NULL);

  if (eResult != ADI_DMA_SUCCESS)
    {
      DBG_MSG ("Failed to open MDMA stream, Error Code: 0x%08X\n",
        eResult);
      return ARM_LINK_ERROR;
    }

  //*************************************************************************
  // Configure MDMA channel
  //*************************************************************************
  adi_mdma_EnableChannelInterrupt (hDestDmaChannel, false, false); // Disable the MDMA destination transfer complete interrupt
  adi_mdma_GetChannelSID (hDestDmaChannel, &nSid_SHARC1_Master); // Get the channel SID for the MDMA destination complete interrupt
  /*add sharc int offset*/
  //adi_sec_SetPriority(nSid_SHARC1_Master,ADI_SEC_MAX_INT_PRIO);
  nSid_SHARC1_Master += SHARC_INT_OFFSET;

  //adi_sec_SetCoreID (nSid_SHARC1_Master, ADI_SEC_CORE_0);

 adi_mdma_EnableChannelInterrupt (hSrcDmaChannel, true, true);    // Enable the MDMA source transfer complete interrupt
  DBG_MSG ( "\n Destination Channel interrupt SID: \t%08X\n ",
        (unsigned int) nSid_SHARC1_Master);

  #if 1
    eResult = adi_dma_UpdateCallback (hSrcDmaChannel, MemDmaCallback,  hMemDmaStream); // Register source transfer complete interrupt
    /* IF (Failure) */
    if (eResult != ADI_DMA_SUCCESS)
      {
        DBG_MSG ("Failed to set DMA callback, Error Code: 0x%08X\n",eResult);
        return ARM_LINK_ERROR;
      }
  #endif

install interrupt on ARM slave:

adi_int_InstallHandler (nSID_SHARC_Master, DataTransferFromSHARCComplete, NULL, true);
    

I can see that MCAPI send me proper interrupt SID(with offset for ARM)

Callback on ARM with RTOS:

void DataTransferFromSHARCComplete(uint32_t SID, void *pCBParam)
{
  // Save the CPU registers
  CPU_SR_ALLOC();
  // Protect a critical section
  CPU_CRITICAL_ENTER();
  // Make the kernel aware that
  // the interrupt has started
  OSIntEnter();
 CPU_CRITICAL_EXIT();
  // Handle the interrupt
  static uint32_t test=0;
  test= BufferFromSHARC1[0];
  BufferFromSHARC1[0]=0;
  // Make the kernel aware that
  // the interrupt has ended
  OSIntExit();
}

What i am missing? help me please.