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Documents FAQ: How do I set up interrupts on SHARC?
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FAQ: How do I set up interrupts on SHARC?

Question:

How do I set up interrupts on SHARC?

---------------------------------------------

Answer:

The header file, adi_int.h, provides prototypes of the SSL interrupt handling APIs and macros that define interrupt IDs. The file can be found in the CCES subdirectory “<install_path>/SHARC/include/services/int” and is included in C/C++ source as follows:

      #include <services/int/adi_int.h>

The following functions are used to install, enable and uninstall interrupts

  • ADI_INT_STATUS adi_int_InstallHandler(uint32_t iid,

ADI_INT_HANDLER_PTR pfHandler, void *pCBParam, bool bEnable);

    • Used to install an interrupt handler for a given interrupt
  • ADI_INT_STATUS adi_int_EnableInt (uint32_t iid, bool bEnable);
    • Enables or disables the specified interrupt
  • ADI_INT_STATUS adi_int_UninstallHandler ( uint32_t   iid );
    • Uninstalls the interrupt handler and disables the source and interrupt

The interrupt IDs macros are defined as the interrupt name prefixed with “INT_CID_”, for example, ADI_CID_GPTMR0I. For a list of the interrupt IDs that are defined for each platform, see the file <<install_path>/SHARC/include/interrupt.h.

Note that <signal.h> now only provides support for the signal-related functions and macros that are required by the C and C++ standards.

Example

Examples using these functions can be found in the ADSP-21469 Board Support Package. See, for example, the “Core_Timer” example, which uses both high- and low-priority timer interrupts.

Documentation

See the System Run-Time Documentation in the CrossCore Embedded Studio Help for more information on the software support for interrupts

Differences from VisualDSP++

VisualDSP++ supported a number of methods of configuring interrupts, each with their own limitations, which led to many user errors and problems. To simplify interrupt support, and to provide a more consistent approach to programming interrupts across Analog Devices’ DSPs, these methods have been removed. The APIs described above are the only supported way to configure interrupts.

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Anonymous
  • bookevg
    bookevg over 1 year ago

    Superfast interrupt handler for traditional Sharc are described by interrupt handler and alternate register set and non-nesting interrupt 

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  • ksam
    ksam over 3 years ago

    Hi,

    I am using ADSP SC589 Ez board in which I am trying to create my own SW interrupts on SHRAC+ cores, with the above steps mentioned, after enabling the interrupt the ISR is not getting triggered.

    For triggering the SW based interrupts on ARM core we are having a function like "adi_gic_GenerateSWI", is there function like this for SHARC+ cores to be called, to get trigger on ISR.

    Awaiting your response.

    ksam

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  • KevinL
    KevinL
    •  Analog Employees 
    over 6 years ago

    Hello,

    just a note to point out that the 21469 board support package link in http://www.analog.com/swexamples still points to the EZ-BRD, while the bsp is located on the EZ-Kit Lite page, not the EZ-BRD page.

    regards,
    Kevin L.

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  • CraigG
    CraigG over 6 years ago in reply to bookevg

    Thanks for pointing that out. I have raised it internally, so the swexamples page can be updated with the EZ-KIT Lite link, rather than the EZ-Board link.

    Regards,

    Craig.

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  • bookevg
    bookevg over 6 years ago in reply to CraigG

    http://www.analog.com/en/evaluation/21469-ezlite/eb.html has the url to the Board Support Package.

    But I tryed to find the url to the Board Support Package the next way from CCES:

    http://www.analog.com/swexamples and it go to http://www.analog.com/en/evaluation/21469-EZBRD/eb.html where I couldn't find the url to the Board Support Package.


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