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Documents Using CrossCore Embedded Studio's CCES Runner Utility Audit
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  • FAQ
  • +a.b silicon into a x.y silicon target: FAQ
  • +accel_xxxx: FAQ
  • +ADC & DAC in audio application: FAQ
  • Add submodule files in CCES
  • +Add version of application in loader file: FAQ
  • Add-in license: FAQ
  • +ADI_SPI_TRANSCEIVER: FAQ
  • +adi_spu_Init() API: FAQ
  • +ADSO-BF609 EZkit: FAQ
  • +ADSP-21364: FAQ
  • +ADSP-214xx: FAQ
  • +ADSP-21569 Ez-kit: FAQ
  • +ADSP-21569: FAQ
  • +ADSP-BF609 EZKIT: FAQ
  • +ADSP-BF609: FAQ
  • +ADSP-BF707: FAQ
  • +ADSP-BF70x: FAQ
  • +ADSP-SC589: FAQ
  • +ADSP-SC58x: FAQ
  • +ADSP-SC59x: FAQs
  • +ADSP-SC5xx: FAQ
  • +ADSP-SC8xx FAQs
  • +ADSP21489: FAQ
  • +ADSP215xx: FAQ
  • +alignment pragma: FAQ
  • +ARM CORE: FAQ
  • +ARM to Sharc: FAQ
  • +avoid when a project is getting build: FAQ
  • +BF-609 Evaluation board: FAQ
  • +BF518 Processor: FAQ
  • +BF703: FAQ
  • +BF706 EZ-KIT: FAQ
  • +BF706: FAQ
  • +BF706mini BSP project: FAQ
  • +BF707 SPI: FAQ
  • BITEXP and BITRET for ADSP-214xx
  • C and C++ standard library in CCES?
  • +C source file: FAQ
  • +C++ code: FAQ
  • +C-code ISRs: FAQ
  • cache invalidation and cache flushing
  • +Callback function: FAQ
  • +Calling Library Functions: FAQ
  • +cc1138: FAQ
  • -CCES: FAQ's
    • "Error: processor 'ADSP-21593' is not supported" Audit
    • Add/Remove switches via CCES console program
    • Allocate all memory in L1 Audit
    • An alternative way to use heap_lookup_name in CCES Audit
    • An assembly language subroutine to delay N cycles in CCES Audit
    • Arm Cycle Counting Audit
    • Assembler error ea1144 Audit
    • Boot without CCES Audit
    • Build multiple projects using Headless Tool
    • Cache Performance Analysis Audit
    • Can we open CCES linker generated XML map file in Chrome browser? Audit
    • CCES 2.9.2 has been released
    • CCES builds applications much slower after installing non-ADI software on my machine Audit
    • CCES launch configuration information
    • CCES License for EV carrier boards
    • CCES3.x.x Installation:
    • Compile DOUBLE64 with DOUBLE32 libraries
    • CrossCore Embedded Studio 1.0.2 has just been released
    • Disabling Auto Program Reload in CCES
    • Does CCES support programming ADuCM355 Controller? Audit
    • Does DDR SDRAM memory reserved for SHARC1 can be used for SHARC0 itself?
    • DXE file in every build Audit
    • FAQ: Is there a way to automate changing processor and forcing re-generation of Startup code by running CCES from the command line?
    • FAQs: Heap Debugging Audit
    • Generate a .bin file in CCES Audit
    • Get timestamp in CCES using command line Audit
    • How can I create a copy of example project available in CCES/BSP into the workspace instead of importing example project directly from installation path?
    • How can I obtain and install a licenses for CrossCore Embedded Studio? Audit
    • How can I view peripheral registers on the Cortex-A55 core (ADSP-SC598 family)? Audit
    • How can we suppress all MISRA rule for a particular function in CCES? Audit
    • How do I debug SHARC applications while running Linux on the ARM core of the ADSP-SC5xx processor?
    • How do I set up interrupts on SHARC? Audit
    • How do I stop CCES rebuilding all my projects when I connect to a Debug Configuration? Audit
    • How do I verify which versions of CCES and CCES Add-Ins I have installed, and the status of my installed licenses for each? Audit
    • How do you modify a generated LDF during project creation in CCES? Audit
    • How Does CCES Node Locked Maintenance License Work Audit
    • How is debugging the ADSP-SC598 family of processors containing Cortex-A55 different than Cortex-A5 processors? Audit
    • How to add .doj files in a text file and create a library?
    • How To Define A Float Variable To "NaN" In C? Audit
    • How to find the size of program in CCES? Audit
    • How to get PDF version CCES compiler, linker, loader manuals? Audit
    • How to identify runtime stack overflow detection in CCES
    • How to make my algorithm as a library in CCES Audit
    • How to switch between SPI 4Byte and 3Byte Addressing Modes Audit
    • How to use Breakpoint Action in CCES? Audit
    • I need to transfer my CCES license to a new machine. How do I register my license against a new host ID (MAC Address)? Audit
    • Imported CCES Example won't build; what is the procedure to import an example? Audit
    • INPUT_SECTION_ALIGN(4) usage in CCES
    • Is CCES_Runner available for Linux ? Audit
    • Is Exclusive-access built-in functions Audit
    • Is it possible to get an exact C equivalent source codes for filter.h Audit
    • Is it possible to make multiple read operations from the same file but not continuing reading past file beginning on multiple reads using CCES_runner. Audit
    • Is there a way to turn off semi-hosting for a core like you can in the debug configuration window in CCES? Audit
    • JTAG chain in CCES Audit
    • Legacy CCES download links
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    • Memory bank problem about 21489 in CCES Audit
    • Modify LDF in CCES Audit
    • Move library/object to specific memory Audit
    • NEON Support for A5 Core in CCES
    • On-board Debug Agent firmware update
    • Organizing and Building Multiple Projects in CCES
    • Partitioning SDRAM on ADSP-BF561 and ADSP-BF609 in CCES Audit
    • PGO in CCES Audit
    • Pre-defined compiler macros in CCES Audit
    • Preprocessor paths tab missing in CCES Audit
    • Regarding linking *.dlb in CCES Audit
    • RSE feature in CCES
    • Source code for CCES libraries
    • Speeding up slow build times Audit
    • Support for eclipse plugins in CCES Audit
    • The validation code that was e-mailed to me is being rejected. What could be the problem? Audit
    • Unable to set breakpoints within code in CCES Audit
    • USB cable for Evaluation board Audit
    • Using CrossCore Embedded Studio's CCES Runner Utility Audit
    • VDSP++'s expressions vs CCES's expressions Audit
    • What are board support packages, and do I need one? Audit
    • What are the system requirements for CCES? Audit
    • What could be the reason for getting network outage issue while activating CCES license Audit
    • What is the difference between a license expiring, and a subscription ending? How do I renew a subscription? Audit
    • What is the procedure for getting CCES / VDSP license key when customer lost the purchased license? Audit
    • Where can I find Example Projects and Code Sketches in CCES? Audit
    • Where can I find my license.dat file in CrossCore Embedded Studio? Audit
    • Why am I receiving a message about my license expiring in x days? Audit
    • Why do I always find additional files called "system.svc" and "adi_initialize.{h|c}" in my CCES project? Audit
    • Why do I encounter the error ‘A valid license could be found’ on starting CrossCore Embedded Studio? Audit
    • Why do I receive, “There was a problem installing the license for this serial number. The serial number has already been used and can be installed only once”? Audit
    • Why is C/C++ compiler switch -Og missing in CCES? Audit
    • [FAQ] How do I view a specific symbol in the CCES plot window?
  • +cldp: FAQ
  • Clip double precision floating-point in C Audit
  • +CLKIN: FAQ
  • +Code folding in CCES: FAQ
  • +Configuring the Loader, Linker and Archiver: FAQ
  • +connect to the Blackfin: FAQ
  • Create Library files for individual modules Audit
  • Creating and Linking a .dlb in CCES
  • +CrossCore Embedded Studio STDIO: FAQ
  • +CROSSCORE: FAQ
  • Custom debug configurations in CCES
  • +Data Member Alignment: FAQ
  • +Device Driver programming: FAQ
  • Difference between ADZS-HPUSB and ADZS-USB ICE Audit Audit
  • Difference between Debug and Release configurations
  • +Difference between Emulator and Simulator: FAQ
  • +disable prelinker: FAQ
  • DND mode in CCES
  • Does CCES have any API that can be used to build automation test platform with Python Audit
  • Does ICE-1000 supported ADSP-CM407F? Audit
  • +Driver example for Timer windowed watchdog period mode.
  • +Embedded applications: FAQ
  • +EV-21569-SOM: FAQ
  • Example code for SPORT slave trigger in ADSP-21569 Ezkit Audit Audit
  • Export console output to the desired file Audit
  • export/import CCES preferences settings
  • +EXTCLK_MODE: FAQ
  • Flash Programmer Drivers for ADSP-2183x/SC83x and ADSP-SC5xx ARM Cortex A5 Cores
  • GUL-XP board with EZkit license Audit
  • +How to access darkmode appearance in CCES?
  • +How to access stereo channels individually in the Audio_Passthrough_I2S example present in GUL BSP?
  • +How to avoid CORE0 and DEBUG: FAQ
  • How to build a specific code from single source file for a specific core?
  • +How to convert long double into string: FAQ
  • How to create library files for individual modules? Audit
  • +how to deassert Slave: FAQ
  • +How to do profiling: FAQ
  • How to obtain PCB library files for ADI processors Audit
  • How to pass arguments from command line in CCES runner
  • +How to protect shared code/ data: FAQ
  • How To remove automatically added "includes" folders in CCES project Audit
  • How to use "log10f_simd" Audit
  • How to use commands in CCES runner Audit
  • How to use Device programmer in EVAL-ADICUP360 board Audit
  • How to use optimized libraries for FFT Audit
  • +HW Accelerator and SW libraries: FAQ
  • INPUT SECTIONS & INPUT SECTIONS PIN EXCLUSIVE Audit
  • Interrupt header files along with -char-size-32 switch in Sharc Audit
  • +Interrupt Vector Table: FAQ
  • Is it possible to perform stepping into the code in CCES Runner. Audit
  • Is there a way to list symbols from library (*.dlb) file? Audit
  • Is there a way to mangle or remove internal symbols ? Audit
  • JTAG switch Interface for EV-SOMCRR-EZLITE and EV-SOMCRR-EZKIT: Audit
  • +LDF from C code: FAQ
  • +linker map file: FAQ
  • +List of Processors: FAQ
  • +Loader File: FAQ
  • +MCAPI package: FAQ
  • +node-locked license: FAQ
  • +non-blocking peek functions: FAQ
  • Optimization in ARM Audit
  • +PART_SPECIFIC_HEADERS: FAQ
  • +path variables: FAQ
  • +peripheral Error: FAQ
  • +PINT modules: FAQ
  • +PM bus: FAQ
  • +Project Explorer tree: FAQ
  • +PWM mode: FAQ
  • +quad SPI mode: FAQ
  • Reset SHARC core from ARM core using RCU in SC573 Audit
  • +RTOS for older Blackfin or older SHARC: FAQ
  • +SC-573 EZkit: FAQ
  • +SC83x-FAQ
  • +SDRAM: FAQ
  • +SHARC 21469: FAQ
  • +SHARC0: FAQ
  • +SHARC: FAQ
  • +sharing global data between cores: FAQ
  • +SigmaStudioForSHARC: FAQ
  • +SIMD code: FAQ
  • +SIMD: FAQ
  • sizeof() built-in function in BF and Sharc processors Audit
  • +SPI core mode with callback: FAQ
  • +SPI flash: FAQ
  • +SPORT API: FAQ
  • +SPORT: FAQ
  • +SRCU bit: FAQ
  • SRU and DAI routing via GUI
  • +SSLDD 2.0 and SSLDD 3.0: FAQ
  • +SSLDD 3.0: FAQ
  • +SSLDD3.0: FAQ
  • +stack overflow: FAQ
  • +Static library & IP protection: FAQ
  • Streaming Data input and output in CCES
  • +suppress assembler preprocessor warning: FAQ
  • SWD with ICE-1000
  • +system.svc: FAQ
  • TDM with both SPORT channels Audit
  • TWI Transfer using 3.0 APIs
  • +two PINT modules: FAQ
  • +TX and RX DMA Interrupts: FAQ
  • Types of Pragma usage Audit
  • +U-Law and A-Law: FAQ
  • +UART Device Driver: FAQ
  • +UART ISR Callback: FAQ
  • UART sample driver code for BF706mini Audit
  • +VisualDSP++: FAQ
  • +Wakeup processor from Hibernate: FAQ
  • +When callback occurs: FAQ
  • +word addressable program: FAQ
  • [FAQ] : FORCE CONTIGUITY Audit
  • “Peripherals view” in CCES

Using CrossCore Embedded Studio's CCES Runner Utility Audit

Overview

This document explains how to load and run programs from the command line using CCES Runner. CCES Runner is a command line utility that can be used to help automate tests. For example, ADI's CrossCore Embedded Studio (CCES) Compiler team runs a suite of automated tests that builds their compiler test programs and then uses CCES runner to run those programs on a target to verify the test results.

Getting Started

Installing CCES Runner from within CrossCore Embedded Studio (CCES)

Installation

  1. From the Help menu, click "Install New Software…".
  2. In the "Work with:" textbox, enter the URL http://www.analog.com/static/ccesupdatesite and hit "Enter".
  3. In the generated list below expand "CrossCore Embedded Studio Command Line Utilities" and choose "CCES Runner".
  4. Click the "Next" button and then the "Next" button again.
  5. Select "I accept the terms of the license agreement" and click "Finish".
  6. Click "Yes" for the restart.

Figure 1: Installing CCES Runner

Updating

  1. To update to the latest version of CCES Runner, under the "Help" menu, click "Check for Updates". If any updates are available they will be installed automatically.

Figure 2: Updating CCES Runner

Or by visiting the "Help" menu, choosing About CrossCore Embedded Studio, Installation Details, click on the feature that you would like to update, and choose "Update...". If any updates are available they will be installed automatically.

Uninstalling

  1. Under the "Help" menu, click "About CrossCore Embedded Studio". Click the "Installation Details" button in this window.
  2. Under the "Installed Software", select CCES Runner and then the "Uninstall…" button at the bottom.
  3. Follow any subsequent prompts and click "Yes" to restart the IDE at the end.

Figure 3: Uninstalling CCES Runner


Running CCES Runner

Once CCES Runner has been installed, the Runner executable file, CCES_runner.exe, will be located under the CrossCore Embedded Studio (CCES) directory. CCES Runner can be run from any directory but if run outside the CCES home directory, the command option --cceshome must be used to specify the location of CCES.

To run CCES Runner:

  1. Open up Command Prompt and navigate to the location of CCES_runner.exe.
  2. Type "CCES_runner.exe" followed by the command line options and arguments.

Example:

To display the help text containing all valid options and their arguments:

Figure 4: Example --help command

Loading and Running Programs

Loading Programs

To run a program, at least these four options must be specified: processor, target, platform, and core. To find the values of these options, the --list option (optional combine with --processor) can be used to list all the possible target and platform values to pass as arguments. Or you can also create a launch configuration in CCES IDE and copy the session configurations into the corresponding command.

Figure 5: Launch configuration in CCES IDE


The following is a brief explanation of the purpose of each command:lo

 

Command

Description

Example

processor The session’s processor. This command must be followed by a string specifying the processor. --processor "ADSP-SC589"
target The session’s target. This command must be followed by a string specifying the target. --target "Emulation Debug Target"
platform The session’s platform. This command must be followed by a string specifying the platform. --platform "ADSP-SC589 via ICE-2000"
core The core as well as its prerequisites (programs that initialize memory and/or set up the system) and program to load and run. The core ID, prerequisites, and program must be separated by a comma. The prerequisite options and program must be separated by a vertical bar, “|”.

--core "0,EMU|KIT|CLEAR_SYMBOLS|RUN_AFTER_LOAD|SHARC\ldr\ezkitSC589_preload_core0_v01,C:\ workspace\ADSP-SC589_Core0\Debug\ADSP-SC589_Core0"

List Command

Use the –list option to view all available targets and platforms. Specify the optional processor string to view all available targets and platforms for a specific processor. The results can then be passed to the --target and --platform commands.

Example:

To list all available combination of targets and platforms for ADSP-BF707:

Figure 6: Example --list command

$ CCES_runner.exe --list --processor ADSP-BF707

Target: ChipFactory Simulator
Platform: ADSP-BF707 Functional-Sim

Target: Blackfin CS Emulator
Platform: ADSP-BF707 via ICE-2000

Target: Blackfin CS Emulator
Platform: ADSP-BF707 via ICE-1000

 

Example command lines to run ADSP-SC589 program(s)

ADSP-SC589 using ICE-2000

$ CCES_runner.exe \
  --target "Emulation Debug Target" \
  --platform "ADSP-SC589 via ICE-2000" \
  --processor ADSP-SC589 \
  --core "0,C:\Users\workspace\cces\2.7.0\test_Core0\Debug\test_Core0" \
  --core "1,C:\Users\workspace\cces\2.7.0\test_Core1\Debug\test_Core1.dxe" \
  --core "2,C:\Users\workspace\cces\2.7.0\test_Core2\Debug\test_Core2.dxe"

ADSP-SC589 using Functional Simulator

$ CCES_runner.exe \ 
--target "ChipFactory Simulator" \ 
--platform "ADSP-SC589 Functional-Sim" \ 
--processor ADSP-SC589 \ 
--core "1,C:\Users\workspace\cces\2.7.0\test_Core1\Debug\test_Core1.dxe" \ 
--core "2,C:\Users\workspace\cces\2.7.0\test_Core2\Debug\test_Core2.dxe"

ADSP-SC589 using Cycle-Accurate Simulator

Please note core id starts from zero.

$ CCES_runner.exe \
  --target "ChipFactory Simulator" \
  --platform "ADSP-SC589 Cycle-Accurate-Sim" \
  --processor ADSP-SC589 \
  --core "0,C:\Users\workspace\cces\2.7.0\test_Core1\Debug\test_Core1.dxe"

Load Prerequisites

As mentioned in the description of the core command, load prerequisites can be specified to be loaded prior to loading the user program. A load prerequisite consists of a DXE file and possible options for that session. Below is a table containing available load prerequisite options:

Options

 

Option

Description

SIM The prerequisite is valid only when connected to a simulator session
EMU The prerequisite is valid only when connected to an emulator session
KIT The prerequisite is valid only when connected to an EZ-KIT Lite session
ANY The prerequisite is valid when connected to any type of session
CLEAR_SYMBOLS The currently loaded symbols will be cleared before the next program is loaded
SYMBOLS_ONLY Only the prerequisite program's symbols will be loaded.  No code/data will be loaded.
NO_RESET_BEFORE_LOAD The core will not be reset before the prerequisite program is loaded.  If this option is not specified, the core will be reset before the load.
RUN_AFTER_LOAD A temporary breakpoint will be set at the prerequisite program's ___lib_prog_term label and the program will be run to that breakpoint.

Preload Program

To specify a prerequisite program, a path that points to the DXE file relative to the CCES installation directory is necessary.
For example, Blackfin\Examples\drivers\flash\BF506F\bf506f_flash.dxe.

Simplification

If prerequisite options are not explicitly specified when using the core command, CCES Runner will see if default preloads are available and load them automatically.

Example:

When running an ADSP-SC589 Core 0 project:

--core "0,C:\workspace\ADSP-SC589_Core0\Debug\ADSP-SC589_Core0"

This command would also load the prerequisite program to set up clocks and DMC settings, so that the debugger is able to load the user’s application to external memory, as

--core "0,EMU|KIT|CLEAR_SYMBOLS|RUN_AFTER_LOAD|SHARC\ldr\ezkitSC589_preload_core0_v01,
        C:\workspace\ADSP-SC589_Core0\Debug
\ADSP-SC589_Core0"

Reading From and Writing Data To Files and Memory

The --datafile option can be used to initialize memory from data stored in a file on the host as well as save data from memory back to a host file. The argument to --datafile is a comma separated string with 8 options as follows:


--datafile "<core>,<direction>,<filename>,<format>,<symbol>,<length>,<stride>,<breakpoint_symbol>"

Options

Argument Description
core The zero based core id to read data from or write data to
direction

One of two values:

in - to specify that data should be loaded from a file and written to target memory after the application is loaded but before it is executed

out - to specify that data should be read from target memory and written to a file upon termination of the application

filename The path and filename of the file on the host to read from or write to
format

binary or binary:le - Specifies a binary file in little-endian format

binary:be - Specifies a binary file in big-endian format

<other> - Specifies a text file format from those listed via the --list-memformats option

symbol A global symbol name or hexadecimal address in your application for the specified core to which data will be read from or written to
length The number of values to read from or write to the file. Or it can be 'all' to specify that the entire file should be read when direction is 'in'.   
stride The stride value to use when reading from or writing to memory. A stride of 1 will use every value while 2 will use every other value and so on.
breakpoint_symbol (Optional) The symbol of a breakpoint to specify when this reading/writing operation happens.

 

Example 1 - Writing a File to Memory

This example reads 4096 values of data from a text file called input.dat which contains floating point formatted numbers on each line and writes it to core 0 memory starting at the address specified by stream_input before the application is run.


--datafile "0,in,input.dat,Floating Point 32 bit,stream_input,4096,1"
--datafile "0,in,input.dat,Floating Point 32 bit,0x001c0c4f,4096,1"

 

Example 2 - Writing Memory to a File

 

This example reads 1024 memory locations on core 0 starting at stream_output and writes it to a binary file called output.dat on the host. The file is written when the applications main() routine terminates.


--datafile "0,out,output.dat,binary,stream_output,1024,1"
--datafile "0,out,output.dat,binary,0x001c0c4f,1024,1"
 

Example 3 - Writing Memory to a File When a Specified Breakpoint is Hit

 

This example reads 1024 memory locations on core 1 starting at stream_output and writes it to a binary file called output.dat on the host. The file is written when the program runs and hits the specified breakpoint symbol 'BP'.


--datafile "1,out,output.dat,binary,stream_output,1024,1,BP"
--datafile "1,out,output.dat,binary,0x001c0c4f,1024,1,BP"

 

Listing Valid Memory Formats

 

Since different processor types have different file formats that they understand the list can vary from part to part. To see the list of valid --datafile <format> options you can use the --list-memformats option in conjunction with a chosen target, platform and processor. This option takes a single parameter called <core> which specifies the zero based core in the processor for which to list formats.

 

$ CCES_Runner.exe \
  --target "Sharc Emulators/EZ-KIT Lites" \
  --platform "ADSP-21489 via ICE-2000" \
  --processor "ADSP-21489" \
  --list-memformats 0

  32 Bit Hexadecimal
  Binary
  Floating Point 32 bit
  Floating Point 40 bit
  Hexadecimal
  Octal
  Signed Fractional
  Signed Integer
  Unsigned Fractional
  Unsigned Integer

 

Setting Breakpoints

The --breakpoint option can be used to set a breakpoint at the specified. One breakpoint option can be used per core but multiple breakpoints can be set in one breakpoint option.

Example:

To set a breakpoint at address 0x001c0c4f, main() and adi_intComponents() for a core 0 program:

--breakpoint "0,0x001c0c4f,main,adi_initComponents"

Profile-Guided Optimization (PGO)


The --pgo command can be used to collect PGO output data in a specified file. Simulator only.

Example:

--pgo "C:\CCESWorkspace\ADSP-BF533\Debug\ADSP-BF533.pgo"

Note:

To find more information about Profile-Guided Optimization and Code Coverage, visit the help contents in CCES:

CrossCoreRegistered Embedded Studio 2.7.0 > SHARCRegistered Development Tools Documentation > C/C++ Compiler Manual for SHARCRegistered Processors > Optimal Performance from C/C++ Source Code > Analyzing Your Application

 

Debug Session Preferences


The --preferences command can be used to set preferences for your CCES Runner debug session. The --preferences command takes a white space delineated list of preferences with optional values.

Example:

To increase the JTAG frequency to 46Mhz when loading and running program(s) using an ICE-2000, add the following command to your CCES Runner command line: --preferences "jtagfrequency=46"

Specify inputs to CCES Runner using an input text file

The -@ or --config option can be used to specify an input text file containing the CCES Runner options.

For example, add the following to a file called options.txt:

target=ADSP-BF5xx Blackfin Family Simulators  
platform=ADSP-BF5xx Single Processor Simulator
processor=ADSP-BF504 
core=0,C:\tmp\bf.dxe
breakpoint=0,main,f1,0xffa00112
datafile=0,out,address-final.dat,Hexadecimal,0xff800598,1,1
datafile=0,out,name-final.dat,Hexadecimal,ga,1,1
datafile=0,out,name-initial.dat,Hexadecimal,ga,1,1,main
datafile=0,out,name-middle.dat,Hexadecimal,ga,1,1,0xffa00112
verbose=2
And specify -@ options.txt on the CCES Runner command line:

$ CCES_Runner.exe -@ options.txt

Specify a custom board support file

The --customboard option can be used to specify a custom board support file. A custom board support file can be used to override the default register reset values with custom memory-mapped registers.

For example,  --customboard BF527-custom.xml

Releases

1.1.0.16

  • Enhancement: improved CCES Runner time-out handling.

1.1.0.15

  • Enhancement: removed the need to specify a core id when only running one program. Improved load prerequisites handling.

1.1.0.14

  • Enhancement: better handling of SHARC processors without an ARM core.

1.1.0.13

  • Bug fix: CCES runner randomly fails using a simulator starget.

1.1.0.12

  • It is now possible to specify a custom board support file using the  --customboard option.

1.1.0.11

  • CCES Runner can now load an entire data file by specifying all in the data file option. For example,  --datafile 0,in,test.dat,binary,buf,all,1.

1.1.0.10

  • Bug fix: --breakpoint fails if symbol does not exist in the executable.

1.1.0.9

  • It is now possible to add your CCES Runner options to an input file and use that file on the CCES Runner command line with the -@ switch.

1.1.0.8

  • Dumping to a data file does not append to the file which means that a new data file is created each time a breakpoint it hit, the data dumped, and execution continues.
  • Fix for issues found by Coverity.
  • Eclipse feature/plugins versions bumped to 1.1.0.0.
Tags: adsp-sc cces Audio Signal Processors idde sharc adsp-21489 adsp-bf707 debugging adsp-sc589 _featured arm Blackfin Embedded Processors SHARC Audio Processors/SoCs cross core embedded studio adsp-sc58x blackfin Show More
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