Analog.com Analog Dialogue Wiki 简体中文
EngineerZone
EngineerZone
  • Log in
  • Site
  • Search
  • Log in
  • Home
  • Blogs ⌵
    • EngineerZone Spotlight
    • The Engineering Mind
    • Analog Garage
  • Browse ⌵
    • All Groups
    • All Members
  • Support ⌵
    • 3D ToF Depth Sensing
    • Amplifiers
    • Analog Microcontrollers
    • Audio
    • Clock and Timing
    • Data Converters
    • Design Tools and Calculators
    • Direct Digital Synthesis (DDS)
    • Embedded Vision Sensing
    • Energy Monitoring and Metering
    • FPGA Reference Designs
    • Industrial Ethernet
    • Interface and Isolation
    • Low Power RF Transceivers
    • MeasureWare
    • MEMS Inertial Sensors
    • Motor Control Hardware Platforms
    • Optical Sensing
    • Power By Linear
    • Processors and DSP
    • Reference Circuits
    • RF and Microwave
    • Switches/Multiplexers
    • Temperature Sensors
    • Video
    • Wireless Sensor Networks Reference Library
  • My EZ
  • More
  • Cancel
CrossCore Embedded Studio and Add-ins
  • Processors and DSP
  • Software and Development Tools
  • CrossCore Embedded Studio and Add-ins
  • More
  • Cancel
CrossCore Embedded Studio and Add-ins
Documents FAQ: Memory bank problem about 21489 in CCES
  • Q&A
  • Discussions
  • Documents
  • File Uploads
  • Video/Images
  • Tags
  • More
  • Cancel
  • New
CrossCore Embedded Studio and Add-ins requires membership for participation - click to join
  • Documents
  • µC/OS-II, µC/OS-III, µC/FS and µC/USB Device Stack 1.1.0 – Available Now
  • Applying RSI Callback function
  • CrossCore Embedded Studio 1.0.3 – Available Now
  • CrossCore Embedded Studio 1.1.0 - Available Now
  • CROSSCORE EMBEDDED STUDIO AND ADD-INS SUPPORT COMMUNITY
  • CrossCore® Embedded Studio – Getting Started
  • FAQ – How can I unlock a secure processor when connecting via an emulator?
  • FAQ – No System Reset Support for the BF70x
  • FAQ: Adding J-Link Lite support to OpenOCD for Cortex-M
  • FAQ: An alternative way to use heap_lookup_name in CCES
  • FAQ: BF706 Boot code (SPIMCODE) descriptions
  • FAQ: Boot without CCES
  • FAQ: Build fails with [Error: li1021] when adding Micrium uC/OS-III Add-In to BF609 Project
  • FAQ: Bulding assembly files(.s) in core0
  • FAQ: Calling Library Functions From an ISR
  • FAQ: Calling the functions in the C source files or C libraries from C++ code
  • FAQ: Can I configure SPI in both Non-Blocking and Callback mode inside a Callback function?
  • FAQ: Can I save and share my CrossCore Embedded Studio Launch Configurations?
  • FAQ: Can I use VisualDSP++ ELF files in CrossCore Embedded Studio?
  • FAQ: Can we call adi_xxx_GetBuffer API after registering a callback?
  • FAQ: Can we open CCES linker generated XML map file in Chrome browser?
  • FAQ: Can't connect to the Blackfin target using DebugAgent
  • FAQ: Can't debug ADSP-SC589 examples.
  • FAQ: CCES builds applications much slower after installing non-ADI software on my machine
  • FAQ: CCES's seg_pmco vs VDSP++'s seg_pmco
  • FAQ: CLDP for Linux?
  • FAQ: Code folding in CCES
  • FAQ: Configuring the Loader, Linker and Archiver settings within Project Properties
  • FAQ: CrossCore Embedded Studio STDIO is slow, and interrupts processing of real world data
  • FAQ: Data Member Alignment - How can I use the variable alignment attribute?
  • FAQ: Define arguments in ADI_SPI_TRANSCEIVER structure
  • FAQ: Diagrams and Figures in CrossCore Embedded Studio 1.1.0 documentation do not display correctly
  • FAQ: Difference between Simulator and Emulator
  • FAQ: Does ADI plan to add ADSP-BF60x simulator capability to CrossCore® Embedded Studio? If so, when?
  • FAQ: Does CrossCore Embedded Studio have a floating license option?
  • FAQ: Does CrossCore Embedded Studio Support C++ 11?
  • FAQ: Doesn’t an Add-in license have a grace period?
  • FAQ: Driver not found for adsp-21489 ez-kit lite
  • FAQ: Encountering the following error - ‘Invalid license file. The license file may be obsolete, corrupted, missing, or read-only’
  • FAQ: Error "Cannot Satisfy Dependency" when installing 3rd Party Plugin under CrossCore Embedded Studio
  • FAQ: Error: The artifact type “Loader File” is not applicable to Add-in “Startup Code/LDF”. The Add-In only applies to “Executable” project(s)
  • FAQ: Evaluation License for Micrium µC/USB Host
  • FAQ: Generate a .bin file in CCES
  • FAQ: How are dependencies managed in CrossCore Embedded Studio
  • FAQ: How are sources in system folder generated from system.svc?
  • FAQ: How can I issue multiple Pre-Build or Post-Build Commands in CrossCore Embedded Studio
  • FAQ: How can I obtain a free evaluation license for the µC/OS Add-Ins?
  • FAQ: How can I obtain and install a licenses for CrossCore Embedded Studio?
  • FAQ: How can I obtain the CrossCore Embedded Studio Software License Agreement?
  • FAQ: How can we suppress all MISRA rule for a particular function in CCES?
  • FAQ: How do I instruct the compiler to generate SIMD code? It is not generated by default.
  • FAQ: How do I set up interrupts on SHARC?
  • FAQ: How do I stop CCES rebuilding all my projects when I connect to a Debug Configuration?
  • FAQ: How do I update the Add-In version being used by my CrossCore Embedded Studio project?
  • FAQ: How do I verify which versions of CCES and CCES Add-Ins I have installed, and the status of my installed licenses for each?
  • FAQ: How do you modify a generated LDF during project creation in CCES?
  • FAQ: How do you upgrade UCOS version on CCES
  • FAQ: How Does CCES Node Locked Maintenance License Work
  • FAQ: How peripheral Errors are reported in device driver programming?
  • FAQ: How to avoid when a project is getting build every time when click debug?
  • FAQ: How to change arm core heap size in ADSP-SC5xx?
  • FAQ: How to clear out "includes" branch of Project Explorer tree?
  • FAQ: How to configure SPORT to work in DMA mode
  • FAQ: How to configure UART RX Interrupt in SHARC 21469
  • FAQ: How to find the size of program in CCES?
  • FAQ: How to load and run a program from flash on ADSP-SC5XX target board using CrossCore Embedded Studio?
  • FAQ: How to make my algorithm as a library in CCES
  • FAQ: How to program two ADSP-21364 on the same JTAG chain Using CLDP
  • FAQ: How to use path variables
  • FAQ: How to use SHARED_MEMORY{} between SHARC cores
  • FAQ: How to use sprintf, strstr and memset functions in the UART ISR Callback?
  • FAQ: I need to transfer my CCES license to a new machine. How do I register my license against a new host ID (MAC Address)?
  • FAQ: Imported CCES Example won't build; what is the procedure to import an example?
  • FAQ: Importing and creating multi-core projects in CrossCore Embedded Studio
  • FAQ: Importing VisualDSP++ project files to CrossCore Embedded Studio
  • FAQ: In Device Driver programming when “Callback” event is called?
  • FAQ: Increasing the maximum number of sockets in the lwIP Add-In for CrossCore Embedded Studio
  • FAQ: INPUT_SECTION_ALIGN(4) usage in CCES
  • FAQ: Is a separate license required to use one of the CrossCore Embedded Studio Add-Ins?
  • FAQ: Is it possible to install both a node-locked license and a corporate domain license on the same machine?
  • FAQ: Is it possible to program BF609 via JTAG using ICE-1000 but without EMU signal?
  • FAQ: Is it possible to register our own handlers for the TX and RX DMA Interrupts by using the adi_fft_RegisterTx and adi_fft_RegisterRX Callback APIs
  • FAQ: Is there a way to turn off semi-hosting for a core like you can in the debug configuration window in CCES?
  • FAQ: Is there any non-blocking API available in the MCAPI package?
  • FAQ: Is there any option available for detecting stack overflow?
  • FAQ: List of Processors supported by Command Line Simulator
  • FAQ: Maintain variable in memory in the same order as in the C source file
  • FAQ: Memory bank problem about 21489 in CCES
  • FAQ: Moving SSL/DD 1.0 (VisualDSP++) Projects to CrossCore Embedded Studio
  • FAQ: Optimizer in C/C++ compiler
  • FAQ: Partitioning SDRAM on ADSP-BF561 and ADSP-BF609 in CCES
  • FAQ: Pin Multiplexing and chip package options
  • FAQ: Preprocessor paths tab missing in CCES
  • FAQ: Regarding linking *.dlb in CCES
  • FAQ: Reporting a Crash or Hang in CrossCore Embedded Studio
  • FAQ: RTOS Status view for uCOSIII in CCES
  • FAQ: Simulator Support for ADSP-BF70x in CrossCore Embedded Studio 1.1.0
  • FAQ: Source code for CCES libraries
  • FAQ: Speeding up slow build times
  • FAQ: Static library & IP protection
  • FAQ: Support for Parallel Builds in CrossCore Embedded Studio
  • FAQ: suppress assembler preprocessor warning
  • FAQ: The Command Line Device Programmer (cldp) cannot connect to the target
  • FAQ: The validation code that was e-mailed to me is being rejected. What could be the problem?
  • FAQ: Trying to load an executable built for a.b silicon into a x.y silicon target. Continue?
  • FAQ: UART Device Driver API adi_uart_SetBaudRate returns failure code
  • FAQ: UART Driver Example "char echo code" for Non blocking mode using BF609
  • FAQ: Unable to set breakpoints within code in CCES
  • FAQ: Upgrading µCOS-III Add-In to version 1.1.0 results in warnings
  • FAQ: Using Blackfin and SHARC from the command line in CrossCore Embedded Studio
  • FAQ: Using CMSIS packs from the command line in CrossCore Embedded Studio
  • FAQ: Using CrossCore Embedded Studio's CCES Runner Utility
  • FAQ: VDSP++'s expressions vs CCES's expressions
  • FAQ: What are board support packages, and do I need one?
  • FAQ: What are the different types of licenses for CrossCore Embedded Studio?
  • FAQ: What are the system requirements for CCES?
  • FAQ: What changes are needed to build a CrossCore Embedded Studio project after moving to another directory?
  • FAQ: What is the current working directory for the Elfloader in CrossCore Embedded Studio
  • FAQ: What is the difference between a license expiring, and a subscription ending? How do I renew a subscription?
  • FAQ: What is the purpose of using non-blocking peek functions?
  • FAQ: What is the reason for getting ADI_SPI_QUEUE_FULL error in nonblocking mode while calling adi_spi_SubmitBuffer() three times inside the interrupt handler?
  • FAQ: When will support for SHARC and additional Blackfin processors be added to CCES?
  • FAQ: Where can I find details of CrossCore Software and Tools Anomaly Reports?
  • FAQ: Where can I find Example Projects and Code Sketches in CCES?
  • FAQ: Where can I find my license.dat file in CrossCore Embedded Studio?
  • FAQ: Where can we find Benchmark for Real FFT processing in ADSP-BF609
  • FAQ: Where is System Run-Time Documentation?
  • FAQ: Where is the #define of __ADSP215xx__ ?
  • FAQ: Which versions of CrossCore Embedded Studio (CCES) do I need to install?
  • FAQ: Why am I receiving a message about my license expiring in x days?
  • FAQ: Why can't I add Startup Code/LDF or Pin Multiplexing Add-Ins to my Loader project in CCES 1.0.0/1.0.1?
  • FAQ: Why do I always find additional files called "system.svc" and "adi_initialize.{h|c}" in my CCES project?
  • FAQ: Why do I encounter the error ‘A valid license could be found’ on starting CrossCore Embedded Studio?
  • FAQ: Why do I receive, “There was a problem installing the license for this serial number. The serial number has already been used and can be installed only once”?
  • FAQ: Why is C/C++ compiler switch -Og missing in CCES?
  • FAQs: Heap Debugging
  • Migrating from VDK to μC/OS-III™ Training Video
  • System Services and Device Drivers for CrossCore® Embedded Studio Training Videos
  • What is the procedure for getting CCES / VDSP license key when customer lost the purchased license?
  • [FAQ] : Do I need to define PI values when I write my code in SHARC processor?
  • [FAQ] : Example project which creates a communication between SPI1 and SPI2 over ports of P1 and P2 (sigma studio) in ADSP-SC589 EZKIT
  • [FAQ] : Example project which generates Timer0 interrupt in SHARC0 to raise interrupt in ARM core as well as SHARC1 via TRU APIs
  • [FAQ] : Example project which helps to understand UART DMA mode operation in SC58x processors
  • [FAQ] : How can I use same GPIO PINT module in both the SHARC cores?
  • [FAQ] : How to calculate Bit clock frequency, SPORT clock divisor & Framesync divisor register values
  • [FAQ] : How to generate Software triggering interrupt to all cores using TRU APIs in ADSP-SC58x/2158x Evaluation boards
  • [FAQ] : How to modify the Interrupt Vector Table with respect to the user defined Interrupt handler?
  • [FAQ] : How to protect shared code/ data in a multithreaded environment?
  • [FAQ] : In SPI while sending data from master to slave, how to deassert "Slave select" signal for a particular period of time during each frame transfer?
  • [FAQ] : Is there any way to use the symbol which was defined in LDF from C code for accessing the size of input section?
  • [FAQ] : SPI flash_read Example project in Callback mode for BF518 Processor
  • [FAQ] : What is the best way of sharing global data between cores?
  • [FAQ] : What is the difference between ADSP-SC58x and ADSP-214xx processors while using run time library functions which access data from external memory?
  • [FAQ] : What is the difference between Critical Regions and Scheduler tasks in Embedded applications?

FAQ: Memory bank problem about 21489 in CCES

Question:

      I'm using the 21489 to run some complex algorithm, it should define many big arrays.when I was running the project, I get the error code like this:

      error: attempt to write to ROM ... with PC at 0x1271f1

      address supplied is invalid with PC at 0x12cd1c

apparently there is not enough SRAM to run the project. unfortunately, for cost saving, I cannot use SDRAM to store the big array. 

I have four questions:

1. I want to define variable on the specified sections, such as "mem_block3_dm32" or "mem_sdram_swco", what should I do?

(suppose I use 21489 + CCES2.1, and the IDE using the default setting)

2. how to allocate variable on the external memory?

3. Can I modified the LDF to resize the data memory space as I want? How to do it?

4. sometimes l find variable will modified by unkown  reason, what should I do to protect these global variable? using "static"?

======================

Answer:

1. I want to define variable on the specified sections, such as "mem_block3_dm32" or "mem_sdram_swco", what should I do?

ANS>>

#pragma section is used to declare a variable name in specified section
Please refer in CCES help for more information
CrossCore Embedded Studio 2.4.0 > Blackfin Development Tools Documentation > C/C++ Compiler and Library Manual for Blackfin Processors > Compiler > C/C++ Compiler Language Extensions > Pragmas > Linking Control Pragmas> #pragma section/#pragma default_section

2. how to allocate variable on the external memory?

ANS>>

If you want to place global variables in your external memory, you can use the section pragmas. The Default LDF has sections and commands defined to allow the placement of data in external memory. For example, the MEMORY{...} block in the LDF contains the section:
seg_ext_dmda  { TYPE(DM RAM) START(0x00900000) END(0x01DFFFFD) WIDTH(16) }

Later, in the SECTIONS{...} block, there is the following 'output section' command:
        seg_sdram_data
        {
            INPUT_SECTIONS( $OBJECTS(seg_dmda) $LIBRARIES(seg_dmda))
            INPUT_SECTIONS( $OBJECTS(seg_ext_data) $LIBRARIES(seg_ext_data))
            INPUT_SECTIONS( $OBJECTS(seg_sdram) $LIBRARIES(seg_sdram))
        } > seg_ext_dmda

So, if you wanted to place a global variable in this location, and ensure it doesn't get placed in internal memory, just use either of the two 'input section' names listed here that are not "seg_dmda". So, either of these would work:
#pragma input_section("seg_ext_data")
int GlobalVariable1
#pragma input_section("seg_sdram")
int GlobalVariable2

Similarly, if you wanted to make sure a function is placed in SDRAM, there is a "seg_ext_code" section defined in the MEMORY{...} block, with a matching set of INPUT_SECTIONS commands, and a 'section' pragma can be used to force the function in here.

If you want to allocate local data from SDRAM, you would need to move the stack/heap to SDRAM by editing the LDF. It is possible to work with multiple heaps (see the section "C/C++ Compiler Manual for SHARC(r) Processors > 1 Compiler > C/C++ Run-Time Model and Environment > Using Multiple Heaps"), however there can only be one stack.

3. Can I modified the LDF to resize the data memory space as I want? How to do it?

ANS>>

To modify the LDF can you please refer the below linked Ezone FAQ which might help you:
FAQ: How do you modify a generated LDF during project creation in CCES?
https://ez.analog.com/docs/DOC-2404

Also Please refer the below given CCES help path:
CrossCore Embedded Studio <version> > System Run-Time Documentation>Startup Code
CrossCore Embedded Studio <version> > Integrated Development Environment > System Configuration > Startup Code/LDF Add-in > Startup Code/LDF Configuration for SHARC Projects > Startup Code/LDF Tab for SHARC Processors>LDF Configuration Page

4. sometimes l find variable will modified by unkown  reason, what should I do to protect these global variable? using "static"?

ANS>>

If you are reporting that the global variables in an application (using default ldf) get reset to "zero" (statically) explicitly. Please note that this is a feature of the C programming languages - static storage duration objects that are not explicitly initialized are implicitly initialized to zero. When an application is downloaded using VisualDSP++ or CCES initializations are done by the emulation support. When not connecting using VisualDSP++ or CCES, initializations are done by the boot kernel.

You can avoid specific global or static variable being initialized using #pragma section with the NO_INIT section qualifier to place the data in a non-default input section. That would also require an LDF addition to map the new section containing the NO_INIT variables to memory appropriately.

For example in C source you would have:

#pragma section("no_init_data", NO_INIT)
char noInitBuffer[N];

And in the LDF would include the input as follows in the SECTION() area:

        seg_dmda_noinit NO_INIT
        {
            INPUT_SECTIONS( $OBJECTS(no_init_data) $LIBRARIES(no_init_data))
        } > seg_dmda

Obviously, you would have to ensure that variables defined in this way are initialized appropriately before being read.

Documentation for #pragma section is available in the VisualDSP++ help system and will be douind by searching for "#pragma section/#pragma default_section".

  • Share
  • History
  • More
  • Cancel
Comments
Anonymous
Related
 
Social
Quick Links
  • About ADI
  • Partners
  • Analog Dialogue
  • Careers
  • Contact us
  • Investor Relations
  • News Room
  • Quality & Reliability
  • Sales & Distribution
  • Analog Garage
Languages
  • English
  • 简体中文
  • 日本語
  • Руccкий
Newsletters

Interested in the latest news and articles about ADI products, design tools, training and events? Choose from one of our 12 newsletters that match your product area of interest, delivered monthly or quarterly to your inbox.

Sign Up
Switch to mobile view
Analog Logo
© 1995 - 2019 Analog Devices, Inc. All Rights Reserved 沪ICP备09046653号
  • ©
  • 1995 - 2019 Analog Devices, Inc. All Rights Reserved
  • 沪ICP备09046653号
  • Sitemap
  • Privacy & Security
  • Privacy Settings
  • Terms of use
EngineerZone Uses cookies to ensure you get the best experience in our community. For more information on cookies, please read our Privacy & Security Statement.