Question:
Where can the cache settings be modified for SHARC-FX?
Answer:
In SHARC+ projects, the cache size settings are configured in the Startup Code/LDF Add-in. You can select different sizes, or disable the caches, using drop-downs in the Cache Configuration pane.
Where in SHARC-FX projects, the instruction and data caches are fixed in size. There is no need to make a trade-off between cache size and availability of L1 memory for your application.
In order to configure cacheable and non-cacheable ranges, or change the cachability settings of specific regions of memory, use the Startup Code/LSP Add-in to configure the cache settings for each memory segment. The settings are accessed by double-clicking on a memory segment to edit it, then clicking the Edit button next to "Access Properties" to change the MPU settings for the segment. Refer attached screenshot.
These settings are then used by CCES to create a table which configures the Memory Protection Unit (MPU).
Note that the adi_cache_set_range API is not provided for SHARC-FX, since it is generally replaced by configuring the MPU settings statically.
