Question:
How to compile CCES project when trying to declare the interrupt header files along with -char-size-32 switch for ADSP-SC58x\ADSP-2158x processors?
Answer:
For SHARC+ processors, the interface to enable interrupts and install interrupt handlers is provided for byte-addressing mode only.
Any source files that are compiled with –char-size-32 and call the interrupt interface results in an error. This restriction does not apply to SHARC processors that do not support a byte-addressing mode.
Please refer the below CCES help path: CrossCore® Embedded Studio <version> > System Run-Time Documentation > Interrupt Support > Interrupt Support Specific to SHARC and SHARC+ Processors>Supported Mode on SHARC+ Processors
ADSP-SC58x\ADSP-2158x have the ability to access individual 8-bit bytes in memory. This feature is known as byte-addressing. Each individual 8-bit byte has a unique address, in contrast to earlier SHARC families which, in the C runtime environment, permitted access to a minimum of 32 bits at a time (known as word-addressing). Byte-addressing permits compatibility with code written assuming that the C/C++ char type is 8 bits in length, and the C/C++ short type is 16 bits in length.
In some cases, you may wish to reuse existing code written for earlier, word-addressed SHARC processors within an application using -char-size-8. Combining such code with the new -char-size-8 parts of your application requires you to direct the compiler regarding the interface between the different application parts. The interface between the byte-addressed and word-addressed parts allows the compiler to perform any necessary conversions.
The pragmas #pragma byte_addressed or #pragma word_addressed you have referenced can be used for your case. You can use the pragma immediately precede a single function or external data declaration. This approach is discussed in detail in CCES help:
CrossCore® Embedded Studio <version> > SHARC® Development Tools Documentation > C/C++ Compiler Manual for SHARC® Processors > Compiler > Using Byte-Addressing > Mixed Char-Size Applications > How to Use Different Char Sizes Together
Regarding interrupt support, please refer in CCES help:
CrossCore® Embedded Studio <version> > System Run-Time Documentation > Interrupt Support > Interrupt Support Specific to SHARC and SHARC+ Processors