Question:
How to calculate Bit clock frequency, SPORT clock divisor & Framesync divisor register values
Answer:
a. How much SPORT clock frequency do we need to generate if we transfer eight Integer data(32bits) with Sampling frequency of 48KHz?
Bit clock frequency = data size * fs
= 8*32*48*1000
= 12.288MHz
b. SPORT Clock divisor value = (serial clock frequency /sport clock frequency)-1
= (100MHz/12.288MHz)-1
= 8-1=7
If we want SPORT to run at 12.288MHz, we need to set SPORT_DIV_A_CLKDIV register as 7
c. Fs divisor value = (sport clock frequency/frame sync frequency)-1
= (12.288MHz/48KHz)-1
= 256-1
= 255
If we want use 48KHz as frame frequency, we need to set SPORT_DIV_A_FSDIV register as 255.