Category: Software
Product Number: ADSP-21594
Hi team,
We have few queries regarding Sport synchronization and interrupt triggering.
Platform used: ADSP-21594 SHARC processor
In our system,we have different data formats such as TDM16 and TDM8 (or) TDM16 and TDM4 combinations.
For the above combinations,the TDM8 and TDM4 clocks are derived from TDM16 clock using PCG. Please find below the block diagram for clock generation.
Since clock source used is same and LRCLK synchronization is done for PCG,we understand that even if BCLK is different for TDM16 and TDM8/TDM4
i) TDM16 and TDM8/TDM4 data will be in synchronization.
ii) DMA filling will happen simultaneously for both TDM16 and TDM8/TDM4 Sports.
iii) TDM16 and TDM8/TDM4 sports can be handled within a single interrupt without any synchronization issues.
Note:
Interrupt triggering is done with the TDM16 Sport for both the combinations.
Kindly let us know if our understanding is correct.
Also more details regarding interrupt priority,interrupt triggering and DMA filling for such a scenario would be supportive.
Thanks and Regards,
B. Shanmuga Eashwari
