Hi.
Soon I will finish to develop supporting to CORE and SECI interrupt handlers which use shadow register set. Now I have done to test simple projects.
Also SECI interrupt handler must support non-nesting superfast and nesting legacy interrupt dispatcher handlers.
Also I have done int_dispatcher_215XX.asm clearer.
Can I attach modified int_dispatcher_215XX.asm to my question?
Best regards.
more info
[edited by: daim at 6:54 PM (GMT -4) on 3 Jul 2024]