Why ADSP-BF706 EZ-Kit Audio Test from POST always fails

Hi,

The audio test of post example in BF706 EZMKIT Mini is an audio loopback test. It requires a hardware wire connection between J1 and J2 port. So, connect the loopback cable from LINE IN to HP in BF706 EZMKIT Mini and check the post example.

Please refer the attached image, the post example worked fine after connected the loopback cable and we tested it in CCES2.11.0. If you are still facing issue means please share us CCES tool version details  to us. This would be helpful for us to assist you further.

Regards,
Santhakumari.K

Hi Santhakumari,

Help me to understand how this could be an Audio  loopback test? Has it mentioned anywhere in the documentation that this is an Audio loopback test? Besides, the 2 ports you mentioned in the response are already connected in the schematics:

If this is not the case, I can connect a direct through cable with 2 3.5mm jacks to J1 and J2. However, this will not work either.

So, what is going on?

Thanks.

Min001

Hi Santhakumari,

Help me to understand how this could be an Audio  loopback test? Has it mentioned anywhere in the documentation that this is an Audio loopback test? Besides, the 2 ports you mentioned in the response are already connected in the schematics:

If this is not the case, I can connect a direct through cable with 2 3.5mm jacks to J1 and J2. However, this will not work either.

So, what is going on?

Thanks.

Min001

Hello Min001,

In this post example, 3KHz sine wave samples are generated, and it is stored inside the Input buffer and then it is copied into TxBuffer1 and TxBuffer2. You can see it in line no: 304 and 335 of the Audio_Post.c file of post example. Then the data of TxBuffer 1 and 2 are submitted to DAC channels by using adi_adau1761_SubmitTxBuffer () APIs. The generated sine wave of DAC channel is passed to ADC channels and then the ADC samples are submitted into RxBuffer1 and 2 by using adi_adau1761_SubmitTxBuffer () APIs. So, it is called loopback test.

Your understanding about hardware connection is correct. J1 and J2 ports are internally connected as mentioned in schematic. So, no external connection is required for run the post example. With or without using loopback cable the example code is working fine as expected in our BF706 EZKIT MINI board. Could you please share us your CCES tool version. It will help us to assist you further.

Regards,
Santhakumari.K

Hello Santha,

Thanks for the response.

Yes, the ADAU1761 Codec takes the simulated 3KHz Sinewave as input and AUDIO Test takes the Codec output to verify the result by using FFT from your Math Library.

I use CCES 2.10.0 which fails this AUDIO Test every time I run it from the POST project. Unfortunately, I don't have the latest CCES 2.11.0. If possible, will you verify it with CCES 2.10.0?

Thanks.

Min001

Hello Min,

Apologies for the inconvenience caused. We had already recorded this issue in our bug tracking database.

We added this patch in the pc that we tested here. So it works fine in our side.

The ADAU1761 codec driver when using adi_sport_ConfigClock() with the bFallingEdge parameter being incorrectly true. A bug whereby the bFallingEdge parameter was not being handled correctly, and this triggered the problems with the ADAU1761 driver examples you have encountered.

We have a patch for you to apply to adi_adau1761.c at
C:\Analog Devices\Audio_EI3_Extender_Board-Rel1.1.0\Audio_EI3\Blackfin\src\drivers\codec\adau1761\

For the two calls of adi_sport_ConfigClock() replace the fourth parameter (true,) in each with:

#if __CCESVERSION__ >= 0x02040000
false, /* CCES-11151 fixed */
#else
true, /* passing true compensates for CCES-11151 */
#endif

Can you please replace the codec driver with the attached one in the below installation path and let us the results.

<installation_path>\Analog Devices\ADSP-BF706_EZ-KIT_Mini-Rel1.1.0\BF706_EZ-Kit_MINI\Blackfin\src\drivers\codec\adau1761

Best Regards,

Santhakumari.K

8345.adi_adau1761.zip

Hello Santha,

Thank you so much for pinpointing the root cause of the problem!

Now I have another question that I need your help with, this may require some help from your Codec expert as well.

How can I make sure the Codec output is exactly 24 bits? What tool do I need to hook up with Codec to verify the output data waveform? 

If possible, please provide me some options so I can make sure the Codec output data format is correct as configured in SigmaStudio?

Thanks.

Min001

Hello Min001,

I support the codec. 

The best way to verify the output data format is to actually look at it using an oscilloscope. I have written this post showing how to take screenshots but it also describes how to setup the scope to be able to extract information from the waveforms. 

(+) How to Take Meaningful Screenshots of I2S Audio Signals - Q&A - Audio - EngineerZone (analog.com)

Dave T