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PCG driver source select


In 21565 pcg driver, there are adi_pcg_ClockSource and adi_pcg_FrameSyncSource functions which provide to use SCLK0 as PCG input.

However when I change to SLCK0, nothing changed, the output from PCG is the same as when I use CLKIN0.

My CLKIN0 is 24.576M, and SCLK0 is 128.88M, why I use different input produce the same output?


  • Hi Foster,

    If you want to select SCLK0 as an input we request you to use adi_pcg_EnableClkPll() API. Please refer register description for PCG_SYNC1 Register

    Here CLKASRC bit decides whether clock is generated from CLKSRC / PLL. If you enable this bit via adi_pcg_EnableClkPll(), then you can provide clock from SCLK0.

    If you are not using this API, then you can use adi_pcg_ClockSource() and adi_pcg_FrameSyncSource() APIs to select whether the clock is selected from external source / from CLKIN0.

    Please refer "Precision Clock A Control 1" Register description. Here the CLKSRC bit decides whether the clock is generated from clkin / external DAI0.

    Hope the example from the following BSP path would be helpful for you to understand how to configure clock source using adi_pcg_Init() API.

    C:\Analog Devices\ADSP-2156x_EZ-KIT-Rel1.0.1\ADSP-2156x_EZ-KIT\Examples\drivers\asrc\ASRC_I2S_Mode

    Best Regards,