SC589 the function fir() output is all zero

Hi!

I'm using the fir() in the <filter.h>, everything is right, input, coeffs, delayline, but the output is all zero, don't know why

Thanks in advance

Best regards!

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  • 0
    •  Analog Employees 
    on Jul 22, 2021 2:32 PM

    Hi,

    We are unable to simulate your issue here with simple project.

    Herewith, we have attached an FIR example code for ADSP-SC589. You can refer and modify the example based on your requirement.

    Could you please confirm whether you have provided proper inputs and coefficients.

    Please note that coefficients must be stored in reverse order in the array coeffs; so coeffs[0] contains the last filter coefficient and coeffs[taps-1] contains the first coefficient. The array must be located in program memory data space so that the single-cycle dual-memory fetch of the processor can be used.

    As the function uses SIMD and circular buffering, the pointer to the delay line is maintained in State[taps] (on an odd-word boundary) rather than in State[0] as in the equivalent scalar version of the FIR function. When the state array is initially empty, the first delay value (Input[0]) is stored in State[0] and the first iteration of the SISD algorithm (using circular buffering) computes.

    At the start of the algorithm, the first delay value (from the input vector) is stored at the front of the state array using post-modify increment, and thus the coefficients should be specified in reverse order. Both the state array and the table of coefficients are accessed using circular buffering.

    Scalar version of the fir function used for sample based processing and vector version of the fir function used for block based processing.

    Please refer the below CCES help path for more details on fir filter.
    CrossCore® Embedded Studio <version>> SHARC® Development Tools Documentation > C/C++ Library Manual for SHARC® Processors > DSP Run-Time Library > DSP Run-Time Library Reference > fir

    The source files for the "fir.asm" and "fir_vec.asm are available in the CCES installation path.
    <Installation_Path>:\Analog Devices\CrossCore Embedded Studio <version>\Sharc\lib\src\libdsp

    If still you are facing any issues, please share the project which replicates this issue with steps to reproduce and please confirm the CCES version you are using. So that we can assist you better.

    Regards,
    Santhakumari.K

    FIR_Example_Core1.rar

Reply
  • 0
    •  Analog Employees 
    on Jul 22, 2021 2:32 PM

    Hi,

    We are unable to simulate your issue here with simple project.

    Herewith, we have attached an FIR example code for ADSP-SC589. You can refer and modify the example based on your requirement.

    Could you please confirm whether you have provided proper inputs and coefficients.

    Please note that coefficients must be stored in reverse order in the array coeffs; so coeffs[0] contains the last filter coefficient and coeffs[taps-1] contains the first coefficient. The array must be located in program memory data space so that the single-cycle dual-memory fetch of the processor can be used.

    As the function uses SIMD and circular buffering, the pointer to the delay line is maintained in State[taps] (on an odd-word boundary) rather than in State[0] as in the equivalent scalar version of the FIR function. When the state array is initially empty, the first delay value (Input[0]) is stored in State[0] and the first iteration of the SISD algorithm (using circular buffering) computes.

    At the start of the algorithm, the first delay value (from the input vector) is stored at the front of the state array using post-modify increment, and thus the coefficients should be specified in reverse order. Both the state array and the table of coefficients are accessed using circular buffering.

    Scalar version of the fir function used for sample based processing and vector version of the fir function used for block based processing.

    Please refer the below CCES help path for more details on fir filter.
    CrossCore® Embedded Studio <version>> SHARC® Development Tools Documentation > C/C++ Library Manual for SHARC® Processors > DSP Run-Time Library > DSP Run-Time Library Reference > fir

    The source files for the "fir.asm" and "fir_vec.asm are available in the CCES installation path.
    <Installation_Path>:\Analog Devices\CrossCore Embedded Studio <version>\Sharc\lib\src\libdsp

    If still you are facing any issues, please share the project which replicates this issue with steps to reproduce and please confirm the CCES version you are using. So that we can assist you better.

    Regards,
    Santhakumari.K

    FIR_Example_Core1.rar

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